Re: [PATCH 06/13] target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON field

[Philippe Mathieu-Daudé]

On 2/11/20 6:37 PM, Peter Maydell wrote:
> We already define FIELD macros for ID_DFR0, so use them in the
> one place where we're doing direct bit value manipulation.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> We have lots of this non-FIELD style in the code, of course;
> I change this one purely because it otherwise looks a bit odd
> sat next to the ID_AA64DFR0 line that was changed in the previous
> patch...
> ---
>   target/arm/cpu.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index dc582da8fa4..e7858b073b5 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1603,7 +1603,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error 
> **errp)
>   #endif
>       } else {
>           cpu->id_aa64dfr0 = FIELD_DP32(cpu->id_aa64dfr0, ID_AA64DFR0, PMUVER, 
> 0);

While this one should be FIELD_DP64(),

> -        cpu->id_dfr0 &= ~(0xf << 24);
> +        cpu->id_dfr0 = FIELD_DP32(cpu->id_dfr0, ID_DFR0, PERFMON, 0);

this one is correct.

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>

>           cpu->pmceid0 = 0;
>           cpu->pmceid1 = 0;
>       }