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[PULL 18/48] target/arm: Rearrange ARMMMUIdxBit
From: |
Peter Maydell |
Subject: |
[PULL 18/48] target/arm: Rearrange ARMMMUIdxBit |
Date: |
Fri, 7 Feb 2020 14:33:13 +0000 |
From: Richard Henderson <address@hidden>
Define via macro expansion, so that renumbering of the base ARMMMUIdx
symbols is automatically reflected in the bit definitions.
Tested-by: Alex Bennée <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.h | 39 +++++++++++++++++++++++----------------
1 file changed, 23 insertions(+), 16 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index aa9728cff62..aa121cd9d0a 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2927,27 +2927,34 @@ typedef enum ARMMMUIdx {
ARMMMUIdx_Stage1_E1 = 1 | ARM_MMU_IDX_NOTLB,
} ARMMMUIdx;
-/* Bit macros for the core-mmu-index values for each index,
+/*
+ * Bit macros for the core-mmu-index values for each index,
* for use when calling tlb_flush_by_mmuidx() and friends.
*/
+#define TO_CORE_BIT(NAME) \
+ ARMMMUIdxBit_##NAME = 1 << (ARMMMUIdx_##NAME & ARM_MMU_IDX_COREIDX_MASK)
+
typedef enum ARMMMUIdxBit {
- ARMMMUIdxBit_E10_0 = 1 << 0,
- ARMMMUIdxBit_E10_1 = 1 << 1,
- ARMMMUIdxBit_E2 = 1 << 2,
- ARMMMUIdxBit_SE3 = 1 << 3,
- ARMMMUIdxBit_SE10_0 = 1 << 4,
- ARMMMUIdxBit_SE10_1 = 1 << 5,
- ARMMMUIdxBit_Stage2 = 1 << 6,
- ARMMMUIdxBit_MUser = 1 << 0,
- ARMMMUIdxBit_MPriv = 1 << 1,
- ARMMMUIdxBit_MUserNegPri = 1 << 2,
- ARMMMUIdxBit_MPrivNegPri = 1 << 3,
- ARMMMUIdxBit_MSUser = 1 << 4,
- ARMMMUIdxBit_MSPriv = 1 << 5,
- ARMMMUIdxBit_MSUserNegPri = 1 << 6,
- ARMMMUIdxBit_MSPrivNegPri = 1 << 7,
+ TO_CORE_BIT(E10_0),
+ TO_CORE_BIT(E10_1),
+ TO_CORE_BIT(E2),
+ TO_CORE_BIT(SE10_0),
+ TO_CORE_BIT(SE10_1),
+ TO_CORE_BIT(SE3),
+ TO_CORE_BIT(Stage2),
+
+ TO_CORE_BIT(MUser),
+ TO_CORE_BIT(MPriv),
+ TO_CORE_BIT(MUserNegPri),
+ TO_CORE_BIT(MPrivNegPri),
+ TO_CORE_BIT(MSUser),
+ TO_CORE_BIT(MSPriv),
+ TO_CORE_BIT(MSUserNegPri),
+ TO_CORE_BIT(MSPrivNegPri),
} ARMMMUIdxBit;
+#undef TO_CORE_BIT
+
#define MMU_USER_IDX 0
static inline int arm_to_core_mmu_idx(ARMMMUIdx mmu_idx)
--
2.20.1
- [PULL 07/48] target/arm: Split out vae1_tlbmask, (continued)
- [PULL 07/48] target/arm: Split out vae1_tlbmask, Peter Maydell, 2020/02/07
- [PULL 08/48] target/arm: Split out alle1_tlbmask, Peter Maydell, 2020/02/07
- [PULL 09/48] target/arm: Simplify tlb_force_broadcast alternatives, Peter Maydell, 2020/02/07
- [PULL 10/48] target/arm: Rename ARMMMUIdx*_S12NSE* to ARMMMUIdx*_E10_*, Peter Maydell, 2020/02/07
- [PULL 11/48] target/arm: Rename ARMMMUIdx_S2NS to ARMMMUIdx_Stage2, Peter Maydell, 2020/02/07
- [PULL 12/48] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*, Peter Maydell, 2020/02/07
- [PULL 13/48] target/arm: Rename ARMMMUIdx_S1SE[01] to ARMMMUIdx_SE10_[01], Peter Maydell, 2020/02/07
- [PULL 14/48] target/arm: Rename ARMMMUIdx*_S1E3 to ARMMMUIdx*_SE3, Peter Maydell, 2020/02/07
- [PULL 17/48] target/arm: Expand TBFLAG_ANY.MMUIDX to 4 bits, Peter Maydell, 2020/02/07
- [PULL 19/48] target/arm: Tidy ARMMMUIdx m-profile definitions, Peter Maydell, 2020/02/07
- [PULL 18/48] target/arm: Rearrange ARMMMUIdxBit,
Peter Maydell <=
- [PULL 16/48] target/arm: Recover 4 bits from TBFLAGs, Peter Maydell, 2020/02/07
- [PULL 15/48] target/arm: Rename ARMMMUIdx_S1E2 to ARMMMUIdx_E2, Peter Maydell, 2020/02/07
- [PULL 21/48] target/arm: Add regime_has_2_ranges, Peter Maydell, 2020/02/07
- [PULL 22/48] target/arm: Update arm_mmu_idx for VHE, Peter Maydell, 2020/02/07
- [PULL 20/48] target/arm: Reorganize ARMMMUIdx, Peter Maydell, 2020/02/07
- [PULL 23/48] target/arm: Update arm_sctlr for VHE, Peter Maydell, 2020/02/07
- [PULL 24/48] target/arm: Update aa64_zva_access for EL2, Peter Maydell, 2020/02/07
- [PULL 25/48] target/arm: Update ctr_el0_access for EL2, Peter Maydell, 2020/02/07
- [PULL 26/48] target/arm: Add the hypervisor virtual counter, Peter Maydell, 2020/02/07
- [PULL 27/48] target/arm: Update timer access for VHE, Peter Maydell, 2020/02/07