Re: [PATCH] target/arm: fix TCG leak for fcvt half->double

[Philippe Mathieu-Daudé]

On 1/31/20 4:34 PM, Alex Bennée wrote:
> When support for the AHP flag was added we inexplicably only freed the
> new temps in one of the two legs. Move those tcg_temp_free to the same
> level as the allocation to fix that leak.

Probably too much code refactoring :/

> Fixes: 486624fcd3eac

Maybe:
Reported-by: Peter Maydell <address@hidden>

> Signed-off-by: Alex Bennée <address@hidden>

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>

> ---
>   target/arm/translate-a64.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index 96a5be2b372..766a03335bf 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -5778,8 +5778,6 @@ static void handle_fp_fcvt(DisasContext *s, int opcode,
>               TCGv_i32 tcg_rd = tcg_temp_new_i32();
>               gen_helper_vfp_fcvt_f16_to_f32(tcg_rd, tcg_rn, tcg_fpst, tcg_ahp);
>               write_fp_sreg(s, rd, tcg_rd);
> -            tcg_temp_free_ptr(tcg_fpst);
> -            tcg_temp_free_i32(tcg_ahp);
>               tcg_temp_free_i32(tcg_rd);
>           } else {
>               /* Half to double */
> @@ -5789,6 +5787,8 @@ static void handle_fp_fcvt(DisasContext *s, int opcode,
>               tcg_temp_free_i64(tcg_rd);
>           }
>           tcg_temp_free_i32(tcg_rn);
> +        tcg_temp_free_ptr(tcg_fpst);
> +        tcg_temp_free_i32(tcg_ahp);
>           break;
>       }
>       default: