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Re: [PATCH] ppc/pnv: change the PowerNV machine devices to be non user c


From: Greg Kurz
Subject: Re: [PATCH] ppc/pnv: change the PowerNV machine devices to be non user creatable
Date: Wed, 29 Jan 2020 14:04:55 +0100

On Wed, 29 Jan 2020 12:37:20 +0100
Cédric Le Goater <address@hidden> wrote:

> The PowerNV machine emulates an OpenPOWER system and the PowerNV chip
> devices are models of the internal logic of the POWER processor. They
> can not be instantiated by the user on the QEMU command line.
> 
> The PHB3/PHB4 devices could be an exception in the future after some
> rework on how the device tree is built. For the moment, exclude them
> also.
> 
> Signed-off-by: Cédric Le Goater <address@hidden>
> ---

Reviewed-by: Greg Kurz <address@hidden>

>  hw/pci-host/pnv_phb3.c      | 2 ++
>  hw/pci-host/pnv_phb3_pbcq.c | 1 +
>  hw/pci-host/pnv_phb4.c      | 3 ++-
>  hw/pci-host/pnv_phb4_pec.c  | 2 ++
>  hw/ppc/pnv_core.c           | 2 ++
>  hw/ppc/pnv_homer.c          | 1 +
>  hw/ppc/pnv_lpc.c            | 1 +
>  hw/ppc/pnv_occ.c            | 1 +
>  8 files changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
> index f03399c40615..74618fadf085 100644
> --- a/hw/pci-host/pnv_phb3.c
> +++ b/hw/pci-host/pnv_phb3.c
> @@ -1115,6 +1115,7 @@ static void pnv_phb3_class_init(ObjectClass *klass, 
> void *data)
>      dc->realize = pnv_phb3_realize;
>      device_class_set_props(dc, pnv_phb3_properties);
>      set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> +    dc->user_creatable = false;
>  }
>  
>  static const TypeInfo pnv_phb3_type_info = {
> @@ -1168,6 +1169,7 @@ static void pnv_phb3_root_port_class_init(ObjectClass 
> *klass, void *data)
>  
>      device_class_set_parent_realize(dc, pnv_phb3_root_port_realize,
>                                      &rpc->parent_realize);
> +    dc->user_creatable = false;
>  
>      k->vendor_id = PCI_VENDOR_ID_IBM;
>      k->device_id = 0x03dc;
> diff --git a/hw/pci-host/pnv_phb3_pbcq.c b/hw/pci-host/pnv_phb3_pbcq.c
> index 6f0c05be682a..f232228b0e28 100644
> --- a/hw/pci-host/pnv_phb3_pbcq.c
> +++ b/hw/pci-host/pnv_phb3_pbcq.c
> @@ -335,6 +335,7 @@ static void pnv_pbcq_class_init(ObjectClass *klass, void 
> *data)
>      xdc->dt_xscom = pnv_pbcq_dt_xscom;
>  
>      dc->realize = pnv_pbcq_realize;
> +    dc->user_creatable = false;
>  }
>  
>  static const TypeInfo pnv_pbcq_type_info = {
> diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
> index 61235d13a696..23cf093928ed 100644
> --- a/hw/pci-host/pnv_phb4.c
> +++ b/hw/pci-host/pnv_phb4.c
> @@ -1290,7 +1290,7 @@ static void pnv_phb4_class_init(ObjectClass *klass, 
> void *data)
>      dc->realize         = pnv_phb4_realize;
>      device_class_set_props(dc, pnv_phb4_properties);
>      set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> -    dc->user_creatable  = true;
> +    dc->user_creatable  = false;
>      dc->reset           = pnv_phb4_reset;
>  
>      xfc->notify         = pnv_phb4_xive_notify;
> @@ -1368,6 +1368,7 @@ static void pnv_phb4_root_port_class_init(ObjectClass 
> *klass, void *data)
>      PCIERootPortClass *rpc = PCIE_ROOT_PORT_CLASS(klass);
>  
>      dc->desc     = "IBM PHB4 PCIE Root Port";
> +    dc->user_creatable = false;
>  
>      device_class_set_parent_realize(dc, pnv_phb4_root_port_realize,
>                                      &rpc->parent_realize);
> diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
> index fd92041d69dc..68e1db3eac4f 100644
> --- a/hw/pci-host/pnv_phb4_pec.c
> +++ b/hw/pci-host/pnv_phb4_pec.c
> @@ -490,6 +490,7 @@ static void pnv_pec_class_init(ObjectClass *klass, void 
> *data)
>  
>      dc->realize = pnv_pec_realize;
>      device_class_set_props(dc, pnv_pec_properties);
> +    dc->user_creatable = false;
>  
>      pecc->xscom_nest_base = pnv_pec_xscom_nest_base;
>      pecc->xscom_pci_base  = pnv_pec_xscom_pci_base;
> @@ -568,6 +569,7 @@ static void pnv_pec_stk_class_init(ObjectClass *klass, 
> void *data)
>  
>      device_class_set_props(dc, pnv_pec_stk_properties);
>      dc->realize = pnv_pec_stk_realize;
> +    dc->user_creatable = false;
>  
>      /* TODO: reset regs ? */
>  }
> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
> index f7247222bceb..234562040de3 100644
> --- a/hw/ppc/pnv_core.c
> +++ b/hw/ppc/pnv_core.c
> @@ -325,6 +325,7 @@ static void pnv_core_class_init(ObjectClass *oc, void 
> *data)
>      dc->realize = pnv_core_realize;
>      dc->unrealize = pnv_core_unrealize;
>      device_class_set_props(dc, pnv_core_properties);
> +    dc->user_creatable = false;
>  }
>  
>  #define DEFINE_PNV_CORE_TYPE(family, cpu_model) \
> @@ -423,6 +424,7 @@ static void pnv_quad_class_init(ObjectClass *oc, void 
> *data)
>  
>      dc->realize = pnv_quad_realize;
>      device_class_set_props(dc, pnv_quad_properties);
> +    dc->user_creatable = false;
>  }
>  
>  static const TypeInfo pnv_quad_info = {
> diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c
> index 93ae42f7e4d1..9a262629b73a 100644
> --- a/hw/ppc/pnv_homer.c
> +++ b/hw/ppc/pnv_homer.c
> @@ -360,6 +360,7 @@ static void pnv_homer_class_init(ObjectClass *klass, void 
> *data)
>      dc->realize = pnv_homer_realize;
>      dc->desc = "PowerNV HOMER Memory";
>      device_class_set_props(dc, pnv_homer_properties);
> +    dc->user_creatable = false;
>  }
>  
>  static const TypeInfo pnv_homer_type_info = {
> diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
> index d1de98f04c08..5989d723c50c 100644
> --- a/hw/ppc/pnv_lpc.c
> +++ b/hw/ppc/pnv_lpc.c
> @@ -762,6 +762,7 @@ static void pnv_lpc_class_init(ObjectClass *klass, void 
> *data)
>      dc->realize = pnv_lpc_realize;
>      dc->desc = "PowerNV LPC Controller";
>      device_class_set_props(dc, pnv_lpc_properties);
> +    dc->user_creatable = false;
>  }
>  
>  static const TypeInfo pnv_lpc_info = {
> diff --git a/hw/ppc/pnv_occ.c b/hw/ppc/pnv_occ.c
> index 2173fac0e798..5a716c256edc 100644
> --- a/hw/ppc/pnv_occ.c
> +++ b/hw/ppc/pnv_occ.c
> @@ -280,6 +280,7 @@ static void pnv_occ_class_init(ObjectClass *klass, void 
> *data)
>      dc->realize = pnv_occ_realize;
>      dc->desc = "PowerNV OCC Controller";
>      device_class_set_props(dc, pnv_occ_properties);
> +    dc->user_creatable = false;
>  }
>  
>  static const TypeInfo pnv_occ_type_info = {




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