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Re: [PATCH] arm/gicv3: update virtual irq state after IAR register read
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH] arm/gicv3: update virtual irq state after IAR register read |
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Date: |
Thu, 16 Jan 2020 18:03:53 +0000 |
On Mon, 13 Jan 2020 at 15:46, Jeff Kubascik
<address@hidden> wrote:
>
> The IAR0/IAR1 register is used to acknowledge an interrupt - a read of the
> register activates the highest priority pending interrupt and provides its
> interrupt ID. Activating an interrupt can change the CPU's virtual interrupt
> state - this change makes sure the virtual irq state is updated.
>
> Signed-off-by: Jeff Kubascik <address@hidden>
> ---
Applied to target-arm.next, thanks.
-- PMM