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Re: [RFC PATCH 1/1] target/arm: kvm: Handle DABT with no valid ISS


From: Peter Maydell
Subject: Re: [RFC PATCH 1/1] target/arm: kvm: Handle DABT with no valid ISS
Date: Tue, 7 Jan 2020 14:28:44 +0000

On Fri, 20 Dec 2019 at 20:27, Beata Michalska
<address@hidden> wrote:
>
> On ARMv7 & ARMv8 some load/store instructions might trigger a data abort
> exception with no valid ISS info to be decoded. The lack of decode info
> makes it at least tricky to emulate those instruction which is one of the
> (many) reasons why KVM will not even try to do so.
>
> Add suport for handling those by requesting KVM to inject external
> dabt into the quest.
>
> Signed-off-by: Beata Michalska <address@hidden>
> ---
> +        /*
> +         * Get current PC before it will get updated to except vector entry
> +         */
> +        target_ulong ins_addr = is_a64(env) ? env->pc
> +                                /* AArch32 mode vs T32 aka Thumb mode */
> +                                : env->regs[15] - (env->thumb ? 4 : 8);

Another thing that occurred to me last night -- why do we need
to do this adjustment of the PC/r15 ? If this is the kernel
handing control to userspace to say "this is not an instruction
I can handle, maybe you'd like to try" then surely it should
do so with the PC pointing at the offending instruction?
Similarly, if we ask the kernel to inject a data abort I
would expect that the kernel would do the work of adjusting
the PC forwards as the architecture requires when taking
the exception.

thanks
-- PMM



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