[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v3 06/12] ppc/pnv: Add an "nr-threads" property to the base chip
From: |
Cédric Le Goater |
Subject: |
[PATCH v3 06/12] ppc/pnv: Add an "nr-threads" property to the base chip class |
Date: |
Mon, 6 Jan 2020 15:56:39 +0100 |
From: Greg Kurz <address@hidden>
Set it at chip creation and forward it to the cores. This allows to drop
a call to qdev_get_machine().
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: David Gibson <address@hidden>
---
include/hw/ppc/pnv.h | 1 +
hw/ppc/pnv.c | 8 +++++---
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 56277862dd53..4b9012f9949e 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -48,6 +48,7 @@ typedef struct PnvChip {
uint64_t ram_size;
uint32_t nr_cores;
+ uint32_t nr_threads;
uint64_t cores_mask;
PnvCore **cores;
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 6d003144b6fc..8f072ea7eff1 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -790,6 +790,8 @@ static void pnv_init(MachineState *machine)
&error_fatal);
object_property_set_int(chip, machine->smp.cores,
"nr-cores", &error_fatal);
+ object_property_set_int(chip, machine->smp.threads,
+ "nr-threads", &error_fatal);
/*
* The POWER8 machine use the XICS interrupt interface.
* Propagate the XICS fabric to the chip and its controllers.
@@ -1514,7 +1516,6 @@ static void pnv_chip_core_sanitize(PnvChip *chip, Error
**errp)
static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
{
- MachineState *ms = MACHINE(qdev_get_machine());
Error *error = NULL;
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
const char *typename = pnv_chip_core_typename(chip);
@@ -1550,8 +1551,8 @@ static void pnv_chip_core_realize(PnvChip *chip, Error
**errp)
object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
&error_abort);
chip->cores[i] = pnv_core;
- object_property_set_int(OBJECT(pnv_core), ms->smp.threads,
"nr-threads",
- &error_fatal);
+ object_property_set_int(OBJECT(pnv_core), chip->nr_threads,
+ "nr-threads", &error_fatal);
object_property_set_int(OBJECT(pnv_core), core_hwid,
CPU_CORE_PROP_CORE_ID, &error_fatal);
object_property_set_int(OBJECT(pnv_core),
@@ -1590,6 +1591,7 @@ static Property pnv_chip_properties[] = {
DEFINE_PROP_UINT64("ram-size", PnvChip, ram_size, 0),
DEFINE_PROP_UINT32("nr-cores", PnvChip, nr_cores, 1),
DEFINE_PROP_UINT64("cores-mask", PnvChip, cores_mask, 0x0),
+ DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1),
DEFINE_PROP_END_OF_LIST(),
};
--
2.21.1
- [PATCH v3 00/12] ppc/pnv: remove the use of qdev_get_machine(), Cédric Le Goater, 2020/01/06
- [PATCH v3 01/12] ppc/pnv: Introduce a "xics" property alias under the PSI model, Cédric Le Goater, 2020/01/06
- [PATCH v3 02/12] ppc/pnv: Introduce a "xics" property under the POWER8 chip, Cédric Le Goater, 2020/01/06
- [PATCH v3 03/12] pnv/xive: Use device_class_set_parent_realize(), Cédric Le Goater, 2020/01/06
- [PATCH v3 04/12] spapr, pnv, xive: Add a "xive-fabric" link to the XIVE router, Cédric Le Goater, 2020/01/06
- [PATCH v3 05/12] xive: Use the XIVE fabric link under the XIVE router, Cédric Le Goater, 2020/01/06
- [PATCH v3 06/12] ppc/pnv: Add an "nr-threads" property to the base chip class,
Cédric Le Goater <=
- [PATCH v3 07/12] ppc/pnv: Add a "pnor" const link property to the BMC internal simulator, Cédric Le Goater, 2020/01/06
- [PATCH v3 08/12] xive: Add a "presenter" link property to the TCTX object, Cédric Le Goater, 2020/01/06
- [PATCH v3 09/12] spapr/xive: Deduce the SpaprXive pointer from XiveTCTX::xptr, Cédric Le Goater, 2020/01/06
- [PATCH v3 10/12] pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptr, Cédric Le Goater, 2020/01/06
- [PATCH v3 11/12] pnv/psi: Add device reset hook, Cédric Le Goater, 2020/01/06
- [PATCH v3 12/12] pnv/psi: Consolidate some duplicated code in pnv_psi_realize(), Cédric Le Goater, 2020/01/06