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[PULL 26/34] tcg: cputlb: Add probe_read
From: |
Peter Maydell |
Subject: |
[PULL 26/34] tcg: cputlb: Add probe_read |
Date: |
Mon, 16 Dec 2019 11:08:56 +0000 |
From: Beata Michalska <address@hidden>
Add probe_read alongside the write probing equivalent.
Signed-off-by: Beata Michalska <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/exec/exec-all.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index d85e610e85b..350c4b451be 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -339,6 +339,12 @@ static inline void *probe_write(CPUArchState *env,
target_ulong addr, int size,
return probe_access(env, addr, size, MMU_DATA_STORE, mmu_idx, retaddr);
}
+static inline void *probe_read(CPUArchState *env, target_ulong addr, int size,
+ int mmu_idx, uintptr_t retaddr)
+{
+ return probe_access(env, addr, size, MMU_DATA_LOAD, mmu_idx, retaddr);
+}
+
#define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line
*/
/* Estimated block size for TB allocation. */
--
2.20.1
- [PULL 15/34] aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass, (continued)
- [PULL 15/34] aspeed: Remove AspeedBoardConfig array and use AspeedMachineClass, Peter Maydell, 2019/12/16
- [PULL 17/34] gpio: fix memory leak in aspeed_gpio_init(), Peter Maydell, 2019/12/16
- [PULL 18/34] aspeed: Change the "scu" property definition, Peter Maydell, 2019/12/16
- [PULL 19/34] aspeed: Change the "nic" property definition, Peter Maydell, 2019/12/16
- [PULL 20/34] target/arm: Honor HCR_EL2.TID2 trapping requirements, Peter Maydell, 2019/12/16
- [PULL 21/34] target/arm: Honor HCR_EL2.TID1 trapping requirements, Peter Maydell, 2019/12/16
- [PULL 22/34] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions, Peter Maydell, 2019/12/16
- [PULL 23/34] target/arm: Handle AArch32 CP15 trapping via HSTR_EL2, Peter Maydell, 2019/12/16
- [PULL 24/34] target/arm: Add support for missing Jazelle system registers, Peter Maydell, 2019/12/16
- [PULL 25/34] arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on(), Peter Maydell, 2019/12/16
- [PULL 26/34] tcg: cputlb: Add probe_read,
Peter Maydell <=
- [PULL 28/34] migration: ram: Switch to ram block writeback, Peter Maydell, 2019/12/16
- [PULL 29/34] target/arm: Add support for DC CVAP & DC CVADP ins, Peter Maydell, 2019/12/16
- [PULL 30/34] hw/arm/sbsa-ref: Simplify by moving the gic in the machine state, Peter Maydell, 2019/12/16
- [PULL 32/34] hw/arm/acpi: enable SHPC native hot plug, Peter Maydell, 2019/12/16
- [PULL 27/34] Memory: Enable writeback for given memory region, Peter Maydell, 2019/12/16
- [PULL 31/34] hw/arm/acpi: simplify AML bit and/or statement, Peter Maydell, 2019/12/16
- [PULL 34/34] target/arm: ensure we use current exception state after SCR update, Peter Maydell, 2019/12/16
- [PULL 33/34] hw/arm/virt: Simplify by moving the gic in the machine state, Peter Maydell, 2019/12/16
- Re: [PULL 00/34] target-arm queue, Peter Maydell, 2019/12/16