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Re: [kvm-unit-tests RFC 04/10] pmu: Check Required Event Support
From: |
Andrew Jones |
Subject: |
Re: [kvm-unit-tests RFC 04/10] pmu: Check Required Event Support |
Date: |
Fri, 13 Dec 2019 20:10:43 +0100 |
On Fri, Dec 06, 2019 at 06:27:18PM +0100, Eric Auger wrote:
> If event counters are implemented check the common events
> required by the PMUv3 are implemented.
>
> Some are unconditionally required (SW_INCR, CPU_CYCLES,
> either INST_RETIRED or INST_SPEC). Some others only are
> required if the implementation implements some other features.
>
> Check those wich are unconditionally required.
>
> This test currently fails on TCG as neither INST_RETIRED
> or INST_SPEC are supported.
>
> Signed-off-by: Eric Auger <address@hidden>
> ---
> arm/pmu.c | 70 +++++++++++++++++++++++++++++++++++++++++++++++
> arm/unittests.cfg | 6 ++++
> 2 files changed, 76 insertions(+)
>
> diff --git a/arm/pmu.c b/arm/pmu.c
> index 8e95251..f78c43f 100644
> --- a/arm/pmu.c
> +++ b/arm/pmu.c
> @@ -102,6 +102,10 @@ static inline void precise_instrs_loop(int loop,
> uint32_t pmcr)
> : [pmcr] "r" (pmcr), [z] "r" (0)
> : "cc");
> }
> +
> +/* event counter tests only implemented for aarch64 */
> +static void test_event_introspection(void) {}
> +
> #elif defined(__aarch64__)
> #define ID_AA64DFR0_PERFMON_SHIFT 8
> #define ID_AA64DFR0_PERFMON_MASK 0xf
> @@ -140,6 +144,69 @@ static inline void precise_instrs_loop(int loop,
> uint32_t pmcr)
> : [pmcr] "r" (pmcr)
> : "cc");
> }
> +
> +#define PMCEID1_EL0 sys_reg(11, 3, 9, 12, 7)
> +
> +static bool is_event_supported(uint32_t n, bool warn)
> +{
> + uint64_t pmceid0 = read_sysreg(pmceid0_el0);
> + uint64_t pmceid1 = read_sysreg_s(PMCEID1_EL0);
> + bool supported;
> + uint32_t reg;
> +
> + if (n >= 0x0 && n <= 0x1F) {
> + reg = pmceid0 & 0xFFFFFFFF;
> + } else if (n >= 0x4000 && n <= 0x401F) {
> + reg = pmceid0 >> 32;
> + } else if (n >= 0x20 && n <= 0x3F) {
> + reg = pmceid1 & 0xFFFFFFFF;
> + } else if (n >= 0x4020 && n <= 0x403F) {
> + reg = pmceid1 >> 32;
Lot's of stray spaces in there. Also the 0x4000 should probably get a
define, and maybe another for the size 0x20.
> + } else {
> + abort();
> + }
> + supported = reg & (1 << n);
> + if (!supported && warn)
> + report_info("event %d is not supported", n);
> + return supported;
> +}
> +
> +static void test_event_introspection(void)
> +{
> + bool required_events;
> +
> + if (!pmu.nb_implemented_counters) {
> + report_skip("No event counter, skip ...");
> + return;
> + }
> + if (pmu.nb_implemented_counters < 2)
> + report_info("%d event counters are implemented. "
> + "ARM recommends to implement at least 2",
> + pmu.nb_implemented_counters);
nit: I'd use {} on these multi-line if's (even if they're just one line)
> +
> + /* PMUv3 requires an implementation includes some common events */
> + required_events = is_event_supported(0x0, true) /* SW_INCR */ &&
> + is_event_supported(0x11, true) /* CPU_CYCLES */ &&
> + (is_event_supported(0x8, true) /* INST_RETIRED */ ||
> + is_event_supported(0x1B, true) /* INST_PREC */);
> + if (!is_event_supported(0x8, false))
> + report_info("ARM strongly recomments INST_RETIRED (0x8) event "
^ recommends
> + "to be implemented");
Do we need to report Arm's recommendation?
> +
> + if (pmu.version == 0x4) {
> + /* ARMv8.1 PMU: STALL_FRONTEND and STALL_BACKEND are required */
> + required_events = required_events ||
> + is_event_supported(0x23, true) ||
> + is_event_supported(0x24, true);
> + }
> +
> + /* L1D_CACHE_REFILL(0x3) and L1D_CACHE(0x4) are only required if
> + L1 data / unified cache. BR_MIS_PRED(0x10), BR_PRED(0x12) are only
> + required if program-flow prediction is implemented. */
> +
> + report("Check required events are implemented", required_events);
> +}
> +
> #endif
>
> /*
> @@ -324,6 +391,9 @@ int main(int argc, char *argv[])
> report("Monotonically increasing cycle count",
> check_cycles_increase());
> report("Cycle/instruction ratio", check_cpi(cpi));
> pmccntr64_test();
> + } else if (strcmp(argv[1], "event-introspection") == 0) {
> + report_prefix_push(argv[1]);
> + test_event_introspection();
> } else {
> report_abort("Unknown subtest '%s'", argv[1]);
> }
> diff --git a/arm/unittests.cfg b/arm/unittests.cfg
> index 79f0d7a..4433ef3 100644
> --- a/arm/unittests.cfg
> +++ b/arm/unittests.cfg
> @@ -66,6 +66,12 @@ file = pmu.flat
> groups = pmu
> extra_params = -append 'cycle-counter 0'
>
> +[pmu-event-introspection]
> +file = pmu.flat
> +groups = pmu
> +arch = arm64
> +extra_params = -append 'event-introspection'
> +
> # Test PMU support (TCG) with -icount IPC=1
> #[pmu-tcg-icount-1]
> #file = pmu.flat
> --
> 2.20.1
>
Thanks,
drew
- [kvm-unit-tests RFC 00/10] KVM: arm64: PMUv3 Event Counter Tests, Eric Auger, 2019/12/06
- [kvm-unit-tests RFC 01/10] arm64: Provide read/write_sysreg_s, Eric Auger, 2019/12/06
- [kvm-unit-tests RFC 02/10] pmu: Let pmu tests take a sub-test parameter, Eric Auger, 2019/12/06
- [kvm-unit-tests RFC 03/10] pmu: Add a pmu struct, Eric Auger, 2019/12/06
- [kvm-unit-tests RFC 04/10] pmu: Check Required Event Support, Eric Auger, 2019/12/06
- Re: [kvm-unit-tests RFC 04/10] pmu: Check Required Event Support,
Andrew Jones <=
- [kvm-unit-tests RFC 05/10] pmu: Basic event counter Tests, Eric Auger, 2019/12/06
- [kvm-unit-tests RFC 06/10] pmu: Test chained counter, Eric Auger, 2019/12/06
- [kvm-unit-tests RFC 08/10] arm: gic: Provide per-IRQ helper functions, Eric Auger, 2019/12/06
- [kvm-unit-tests RFC 07/10] arm: pmu: test 32-bit <-> 64-bit transitions, Eric Auger, 2019/12/06
- [kvm-unit-tests RFC 09/10] arm/arm64: gic: Introduce setup_irq() helper, Eric Auger, 2019/12/06
- [kvm-unit-tests RFC 10/10] pmu: Test overflow interrupts, Eric Auger, 2019/12/06