[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH v5 15/22] target/arm: Clean address for DC ZVA
From: |
Peter Maydell |
Subject: |
Re: [PATCH v5 15/22] target/arm: Clean address for DC ZVA |
Date: |
Thu, 5 Dec 2019 18:58:21 +0000 |
On Fri, 11 Oct 2019 at 14:50, Richard Henderson
<address@hidden> wrote:
>
> This data access was forgotten in the previous patch.
>
> Fixes: 3a471103ac1823ba
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target/arm/translate-a64.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index 4e049bb4aa..49817b96ae 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -1766,7 +1766,7 @@ static void handle_sys(DisasContext *s, uint32_t insn,
> bool isread,
> return;
> case ARM_CP_DC_ZVA:
> /* Writes clear the aligned block of memory which rt points into. */
> - tcg_rt = cpu_reg(s, rt);
> + tcg_rt = clean_data_tbi(s, cpu_reg(s, rt), false);
> gen_helper_dc_zva(cpu_env, tcg_rt);
> return;
...doesn't this mean we don't do a tag check for DC ZVA?
Or is that handled in the helper ? (I guess it has to be,
the DC ZVA will span multiple tag granules).
thanks
-- PMM