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[PATCH 11/11] target/arm: Enable ARMv8.2-ATS1E1 in -cpu max
From: |
Richard Henderson |
Subject: |
[PATCH 11/11] target/arm: Enable ARMv8.2-ATS1E1 in -cpu max |
Date: |
Tue, 3 Dec 2019 14:53:33 -0800 |
This includes enablement of ARMv8.1-PAN.
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/cpu.c | 4 ++++
target/arm/cpu64.c | 5 +++++
2 files changed, 9 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index f3360dbb98..3b0c466137 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2640,6 +2640,10 @@ static void arm_max_initfn(Object *obj)
t = FIELD_DP32(t, MVFR2, FPMISC, 4); /* FP MaxNum */
cpu->isar.mvfr2 = t;
+ t = cpu->id_mmfr3;
+ t = FIELD_DP32(t, ID_MMFR3, PAN, 2); /* ATS1E1 */
+ cpu->id_mmfr3 = t;
+
t = cpu->id_mmfr4;
t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */
cpu->id_mmfr4 = t;
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 009411813f..9399253b4c 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -671,6 +671,7 @@ static void aarch64_max_initfn(Object *obj)
t = FIELD_DP64(t, ID_AA64MMFR1, HPDS, 1); /* HPD */
t = FIELD_DP64(t, ID_AA64MMFR1, LO, 1);
t = FIELD_DP64(t, ID_AA64MMFR1, VH, 1);
+ t = FIELD_DP64(t, ID_AA64MMFR1, PAN, 2); /* ATS1E1 */
cpu->isar.id_aa64mmfr1 = t;
/* Replicate the same data to the 32-bit id registers. */
@@ -691,6 +692,10 @@ static void aarch64_max_initfn(Object *obj)
u = FIELD_DP32(u, ID_ISAR6, SPECRES, 1);
cpu->isar.id_isar6 = u;
+ u = cpu->id_mmfr3;
+ u = FIELD_DP32(u, ID_MMFR3, PAN, 2); /* ATS1E1 */
+ cpu->id_mmfr3 = u;
+
/*
* FIXME: We do not yet support ARMv8.2-fp16 for AArch32 yet,
* so do not set MVFR1.FPHP. Strictly speaking this is not legal,
--
2.17.1
- [PATCH 07/11] target/arm: Update arm_mmu_idx_el for PAN, (continued)
- [PATCH 07/11] target/arm: Update arm_mmu_idx_el for PAN, Richard Henderson, 2019/12/03
- [PATCH 05/11] target/arm: Add isar_feature tests for PAN + ATS1E1, Richard Henderson, 2019/12/03
- [PATCH 03/11] target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled, Richard Henderson, 2019/12/03
- [PATCH 09/11] target/arm: Set PAN bit as required on exception entry, Richard Henderson, 2019/12/03
- [PATCH 08/11] target/arm: Enforce PAN semantics in get_S1prot, Richard Henderson, 2019/12/03
- [PATCH 11/11] target/arm: Enable ARMv8.2-ATS1E1 in -cpu max,
Richard Henderson <=
- [PATCH 10/11] target/arm: Implement ATS1E1 system registers, Richard Henderson, 2019/12/03