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Re: [PATCH v6 9/9] hw/arm/xilinx_zynq: connect uart clocks to slcr

From: Philippe Mathieu-Daudé
Subject: Re: [PATCH v6 9/9] hw/arm/xilinx_zynq: connect uart clocks to slcr
Date: Tue, 3 Dec 2019 16:29:13 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.2

On 12/3/19 3:59 PM, Damien Hedde wrote:
On 12/2/19 4:34 PM, Peter Maydell wrote:
On Wed, 4 Sep 2019 at 13:56, Damien Hedde <address@hidden> wrote:

Add the connection between the slcr's output clocks and the uarts inputs.

Also add the main board clock 'ps_clk', which is hard-coded to 33.33MHz
(the default frequency). This clock is used to feed the slcr's input

Signed-off-by: Damien Hedde <address@hidden>

Nothing obviously wrong in the body of the patch, but as with
7 and 8, review from a Xilinx person would be helpful.

/* board base frequency: 33.333333 MHz */
#define PS_CLK_FREQUENCY (100 * 1000 * 1000 / 3)

This is interesting, because it's not an integer... I'll come back
to this topic in a reply to the cover letter in a moment.

For this precise case, what I wanted is the resulting integer which I
got from the device trees in linux (btw I should probably add this point
in  comment). Just thought it was more readable this way than "33333333".

FWIW I'm auditing if it is possible to use the float type for frequencies (before to ask on the list if this makes sense), because in hw/core/ptimer we use timers with periods, and loose some precision using 1/freq again.

Also we have MiB/KiB in "qemu/units.h" and I'd like to introduce MHz/KHz.

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