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[PULL 23/51] target/arm: Rebuild hflags for M-profile NVIC
From: |
Peter Maydell |
Subject: |
[PULL 23/51] target/arm: Rebuild hflags for M-profile NVIC |
Date: |
Thu, 24 Oct 2019 17:26:56 +0100 |
From: Richard Henderson <address@hidden>
Continue setting, but not relying upon, env->hflags.
Suggested-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
hw/intc/armv7m_nvic.c | 22 +++++++++++++---------
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 8e93e51e815..e8c74f9ebaf 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -2251,7 +2251,7 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr
addr,
}
}
nvic_irq_update(s);
- return MEMTX_OK;
+ goto exit_ok;
case 0x200 ... 0x23f: /* NVIC Set pend */
/* the special logic in armv7m_nvic_set_pending()
* is not needed since IRQs are never escalated
@@ -2269,9 +2269,9 @@ static MemTxResult nvic_sysreg_write(void *opaque, hwaddr
addr,
}
}
nvic_irq_update(s);
- return MEMTX_OK;
+ goto exit_ok;
case 0x300 ... 0x33f: /* NVIC Active */
- return MEMTX_OK; /* R/O */
+ goto exit_ok; /* R/O */
case 0x400 ... 0x5ef: /* NVIC Priority */
startvec = (offset - 0x400) + NVIC_FIRST_IRQ; /* vector # */
@@ -2281,10 +2281,10 @@ static MemTxResult nvic_sysreg_write(void *opaque,
hwaddr addr,
}
}
nvic_irq_update(s);
- return MEMTX_OK;
+ goto exit_ok;
case 0xd18 ... 0xd1b: /* System Handler Priority (SHPR1) */
if (!arm_feature(&s->cpu->env, ARM_FEATURE_M_MAIN)) {
- return MEMTX_OK;
+ goto exit_ok;
}
/* fall through */
case 0xd1c ... 0xd23: /* System Handler Priority (SHPR2, SHPR3) */
@@ -2299,10 +2299,10 @@ static MemTxResult nvic_sysreg_write(void *opaque,
hwaddr addr,
set_prio(s, hdlidx, sbank, newprio);
}
nvic_irq_update(s);
- return MEMTX_OK;
+ goto exit_ok;
case 0xd28 ... 0xd2b: /* Configurable Fault Status (CFSR) */
if (!arm_feature(&s->cpu->env, ARM_FEATURE_M_MAIN)) {
- return MEMTX_OK;
+ goto exit_ok;
}
/* All bits are W1C, so construct 32 bit value with 0s in
* the parts not written by the access size
@@ -2322,15 +2322,19 @@ static MemTxResult nvic_sysreg_write(void *opaque,
hwaddr addr,
*/
s->cpu->env.v7m.cfsr[M_REG_NS] &= ~(value & R_V7M_CFSR_BFSR_MASK);
}
- return MEMTX_OK;
+ goto exit_ok;
}
if (size == 4) {
nvic_writel(s, offset, value, attrs);
- return MEMTX_OK;
+ goto exit_ok;
}
qemu_log_mask(LOG_GUEST_ERROR,
"NVIC: Bad write of size %d at offset 0x%x\n", size, offset);
/* This is UNPREDICTABLE; treat as RAZ/WI */
+
+ exit_ok:
+ /* Ensure any changes made are reflected in the cached hflags. */
+ arm_rebuild_hflags(&s->cpu->env);
return MEMTX_OK;
}
--
2.20.1
- [PULL 15/51] target/arm: Split out arm_mmu_idx_el, (continued)
- [PULL 15/51] target/arm: Split out arm_mmu_idx_el, Peter Maydell, 2019/10/24
- [PULL 16/51] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/24
- [PULL 12/51] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/24
- [PULL 18/51] target/arm: Rebuild hflags at EL changes, Peter Maydell, 2019/10/24
- [PULL 13/51] target/arm: Hoist computation of TBFLAG_A32.VFPEN, Peter Maydell, 2019/10/24
- [PULL 17/51] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}), Peter Maydell, 2019/10/24
- [PULL 19/51] target/arm: Rebuild hflags at MSR writes, Peter Maydell, 2019/10/24
- [PULL 20/51] target/arm: Rebuild hflags at CPSR writes, Peter Maydell, 2019/10/24
- [PULL 21/51] target/arm: Rebuild hflags at Xscale SCTLR writes, Peter Maydell, 2019/10/24
- [PULL 22/51] target/arm: Rebuild hflags for M-profile, Peter Maydell, 2019/10/24
- [PULL 23/51] target/arm: Rebuild hflags for M-profile NVIC,
Peter Maydell <=
- [PULL 24/51] linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN, Peter Maydell, 2019/10/24
- [PULL 25/51] linux-user/arm: Rebuild hflags for TARGET_WORDS_BIGENDIAN, Peter Maydell, 2019/10/24
- [PULL 26/51] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state, Peter Maydell, 2019/10/24
- [PULL 27/51] hw/net/fsl_etsec/etsec.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 28/51] hw/timer/xilinx_timer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 29/51] hw/dma/xilinx_axidma.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 30/51] hw/timer/slavio_timer: Remove useless check for NULL t->timer, Peter Maydell, 2019/10/24
- [PULL 32/51] hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 34/51] hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24
- [PULL 31/51] hw/timer/slavio_timer.c: Switch to transaction-based ptimer API, Peter Maydell, 2019/10/24