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[QEMU][PATCH v2] ssi: xilinx_spips: Skip update of cs and fifo releated


From: Sai Pavan Boddu
Subject: [QEMU][PATCH v2] ssi: xilinx_spips: Skip update of cs and fifo releated to spips in gqspi
Date: Thu, 17 Oct 2019 15:47:54 +0530

GQSPI handles chip selects and fifos in a different way compared to
spips. So skip update of cs and fifos related to spips in gqspi mode.

Signed-off-by: Sai Pavan Boddu <address@hidden>
---
Changes for V2:
    Just skip update of spips cs and fifos
    Update commit message accordingly

 hw/ssi/xilinx_spips.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index a309c71..27154b0 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -1022,6 +1022,13 @@ static void xilinx_spips_write(void *opaque, hwaddr addr,
     }
     s->regs[addr] = (s->regs[addr] & ~mask) | (value & mask);
 no_reg_update:
+    /* In GQSPI mode skip update of CS and fifo's related to spips */
+    if (object_dynamic_cast(OBJECT(s), TYPE_XLNX_ZYNQMP_QSPIPS)) {
+        XlnxZynqMPQSPIPS *ss = XLNX_ZYNQMP_QSPIPS(s);
+        if (ARRAY_FIELD_EX32(ss->regs, GQSPI_SELECT, GENERIC_QSPI_EN)) {
+            return;
+        }
+    }
     xilinx_spips_update_cs_lines(s);
     xilinx_spips_check_flush(s);
     xilinx_spips_update_cs_lines(s);
-- 
2.7.4




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