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[PULL 40/68] aspeed/wdt: Check correct register for clock source
From: |
Peter Maydell |
Subject: |
[PULL 40/68] aspeed/wdt: Check correct register for clock source |
Date: |
Mon, 14 Oct 2019 17:03:36 +0100 |
From: Amithash Prasad <address@hidden>
When WDT_RESTART is written, the data is not the contents
of the WDT_CTRL register. Hence ensure we are looking at
WDT_CTRL to check if bit WDT_CTRL_1MHZ_CLK is set or not.
Signed-off-by: Amithash Prasad <address@hidden>
Reviewed-by: Joel Stanley <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Message-id: address@hidden
[clg: improved Suject prefix ]
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Joel Stanley <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/watchdog/wdt_aspeed.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
index 9b932134172..f710036535d 100644
--- a/hw/watchdog/wdt_aspeed.c
+++ b/hw/watchdog/wdt_aspeed.c
@@ -140,7 +140,7 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset,
uint64_t data,
case WDT_RESTART:
if ((data & 0xFFFF) == WDT_RESTART_MAGIC) {
s->regs[WDT_STATUS] = s->regs[WDT_RELOAD_VALUE];
- aspeed_wdt_reload(s, !(data & WDT_CTRL_1MHZ_CLK));
+ aspeed_wdt_reload(s, !(s->regs[WDT_CTRL] & WDT_CTRL_1MHZ_CLK));
}
break;
case WDT_CTRL:
--
2.20.1
- [PULL 29/68] target/arm/arm-semi: Restrict use of TaskState*, (continued)
- [PULL 29/68] target/arm/arm-semi: Restrict use of TaskState*, Peter Maydell, 2019/10/14
- [PULL 31/68] target/arm/arm-semi: Factor out implementation of SYS_CLOSE, Peter Maydell, 2019/10/14
- [PULL 32/68] target/arm/arm-semi: Factor out implementation of SYS_WRITE, Peter Maydell, 2019/10/14
- [PULL 33/68] target/arm/arm-semi: Factor out implementation of SYS_READ, Peter Maydell, 2019/10/14
- [PULL 34/68] target/arm/arm-semi: Factor out implementation of SYS_ISTTY, Peter Maydell, 2019/10/14
- [PULL 35/68] target/arm/arm-semi: Factor out implementation of SYS_SEEK, Peter Maydell, 2019/10/14
- [PULL 36/68] target/arm/arm-semi: Factor out implementation of SYS_FLEN, Peter Maydell, 2019/10/14
- [PULL 37/68] target/arm/arm-semi: Implement support for semihosting feature detection, Peter Maydell, 2019/10/14
- [PULL 38/68] target/arm/arm-semi: Implement SH_EXT_EXIT_EXTENDED extension, Peter Maydell, 2019/10/14
- [PULL 39/68] target/arm/arm-semi: Implement SH_EXT_STDOUT_STDERR extension, Peter Maydell, 2019/10/14
- [PULL 40/68] aspeed/wdt: Check correct register for clock source,
Peter Maydell <=
- [PULL 41/68] hw/sd/aspeed_sdhci: New device, Peter Maydell, 2019/10/14
- [PULL 44/68] aspeed/timer: Add support for control register 3, Peter Maydell, 2019/10/14
- [PULL 42/68] hw: aspeed_scu: Add AST2600 support, Peter Maydell, 2019/10/14
- [PULL 43/68] aspeed/timer: Introduce an object class per SoC, Peter Maydell, 2019/10/14
- [PULL 45/68] aspeed/timer: Add AST2600 support, Peter Maydell, 2019/10/14
- [PULL 46/68] aspeed/timer: Add support for IRQ status register on the AST2600, Peter Maydell, 2019/10/14
- [PULL 47/68] aspeed/sdmc: Introduce an object class per SoC, Peter Maydell, 2019/10/14
- [PULL 48/68] aspeed/sdmc: Add AST2600 support, Peter Maydell, 2019/10/14
- [PULL 50/68] hw: wdt_aspeed: Add AST2600 support, Peter Maydell, 2019/10/14
- [PULL 49/68] watchdog/aspeed: Introduce an object class per SoC, Peter Maydell, 2019/10/14