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[PULL 15/18] target/mips: msa: Split helpers for DIV_<S|U>.<B|H|W|D>
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From: |
Aleksandar Markovic |
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Subject: |
[PULL 15/18] target/mips: msa: Split helpers for DIV_<S|U>.<B|H|W|D> |
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Date: |
Tue, 1 Oct 2019 17:15:41 +0200 |
From: Aleksandar Markovic <address@hidden>
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Aleksandar Rikalo <address@hidden>
Message-Id: <address@hidden>
---
target/mips/helper.h | 12 +++-
target/mips/msa_helper.c | 167 +++++++++++++++++++++++++++++++++++++++++------
target/mips/translate.c | 38 +++++++++--
3 files changed, 190 insertions(+), 27 deletions(-)
diff --git a/target/mips/helper.h b/target/mips/helper.h
index 29dfcf0..ec4982f 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -867,6 +867,16 @@ DEF_HELPER_4(msa_clt_u_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_clt_u_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_clt_u_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_div_s_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_div_s_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_div_s_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_div_s_d, void, env, i32, i32, i32)
+
+DEF_HELPER_4(msa_div_u_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_div_u_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_div_u_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_div_u_d, void, env, i32, i32, i32)
+
DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
@@ -929,8 +939,6 @@ DEF_HELPER_5(msa_asub_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_mulv_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_maddv_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_msubv_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_div_s_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_div_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_mod_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_mod_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_dotp_s_df, void, env, i32, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index b658f48..ceccd8f 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -1525,7 +1525,154 @@ void helper_msa_clt_u_d(CPUMIPSState *env,
* +---------------+----------------------------------------------------------+
*/
-/* TODO: insert Int Divide group helpers here */
+
+static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+ if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
+ return DF_MIN_INT(df);
+ }
+ return arg2 ? arg1 / arg2
+ : arg1 >= 0 ? -1 : 1;
+}
+
+void helper_msa_div_s_b(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_div_s_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_div_s_df(DF_BYTE, pws->b[1], pwt->b[1]);
+ pwd->b[2] = msa_div_s_df(DF_BYTE, pws->b[2], pwt->b[2]);
+ pwd->b[3] = msa_div_s_df(DF_BYTE, pws->b[3], pwt->b[3]);
+ pwd->b[4] = msa_div_s_df(DF_BYTE, pws->b[4], pwt->b[4]);
+ pwd->b[5] = msa_div_s_df(DF_BYTE, pws->b[5], pwt->b[5]);
+ pwd->b[6] = msa_div_s_df(DF_BYTE, pws->b[6], pwt->b[6]);
+ pwd->b[7] = msa_div_s_df(DF_BYTE, pws->b[7], pwt->b[7]);
+ pwd->b[8] = msa_div_s_df(DF_BYTE, pws->b[8], pwt->b[8]);
+ pwd->b[9] = msa_div_s_df(DF_BYTE, pws->b[9], pwt->b[9]);
+ pwd->b[10] = msa_div_s_df(DF_BYTE, pws->b[10], pwt->b[10]);
+ pwd->b[11] = msa_div_s_df(DF_BYTE, pws->b[11], pwt->b[11]);
+ pwd->b[12] = msa_div_s_df(DF_BYTE, pws->b[12], pwt->b[12]);
+ pwd->b[13] = msa_div_s_df(DF_BYTE, pws->b[13], pwt->b[13]);
+ pwd->b[14] = msa_div_s_df(DF_BYTE, pws->b[14], pwt->b[14]);
+ pwd->b[15] = msa_div_s_df(DF_BYTE, pws->b[15], pwt->b[15]);
+}
+
+void helper_msa_div_s_h(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_div_s_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_div_s_df(DF_HALF, pws->h[1], pwt->h[1]);
+ pwd->h[2] = msa_div_s_df(DF_HALF, pws->h[2], pwt->h[2]);
+ pwd->h[3] = msa_div_s_df(DF_HALF, pws->h[3], pwt->h[3]);
+ pwd->h[4] = msa_div_s_df(DF_HALF, pws->h[4], pwt->h[4]);
+ pwd->h[5] = msa_div_s_df(DF_HALF, pws->h[5], pwt->h[5]);
+ pwd->h[6] = msa_div_s_df(DF_HALF, pws->h[6], pwt->h[6]);
+ pwd->h[7] = msa_div_s_df(DF_HALF, pws->h[7], pwt->h[7]);
+}
+
+void helper_msa_div_s_w(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_div_s_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_div_s_df(DF_WORD, pws->w[1], pwt->w[1]);
+ pwd->w[2] = msa_div_s_df(DF_WORD, pws->w[2], pwt->w[2]);
+ pwd->w[3] = msa_div_s_df(DF_WORD, pws->w[3], pwt->w[3]);
+}
+
+void helper_msa_div_s_d(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_div_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_div_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
+}
+
+static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
+{
+ uint64_t u_arg1 = UNSIGNED(arg1, df);
+ uint64_t u_arg2 = UNSIGNED(arg2, df);
+ return arg2 ? u_arg1 / u_arg2 : -1;
+}
+
+void helper_msa_div_u_b(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_div_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_div_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
+ pwd->b[2] = msa_div_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
+ pwd->b[3] = msa_div_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
+ pwd->b[4] = msa_div_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
+ pwd->b[5] = msa_div_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
+ pwd->b[6] = msa_div_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
+ pwd->b[7] = msa_div_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
+ pwd->b[8] = msa_div_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
+ pwd->b[9] = msa_div_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
+ pwd->b[10] = msa_div_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
+ pwd->b[11] = msa_div_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
+ pwd->b[12] = msa_div_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
+ pwd->b[13] = msa_div_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
+ pwd->b[14] = msa_div_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
+ pwd->b[15] = msa_div_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
+}
+
+void helper_msa_div_u_h(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_div_u_df(DF_HALF, pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_div_u_df(DF_HALF, pws->h[1], pwt->h[1]);
+ pwd->h[2] = msa_div_u_df(DF_HALF, pws->h[2], pwt->h[2]);
+ pwd->h[3] = msa_div_u_df(DF_HALF, pws->h[3], pwt->h[3]);
+ pwd->h[4] = msa_div_u_df(DF_HALF, pws->h[4], pwt->h[4]);
+ pwd->h[5] = msa_div_u_df(DF_HALF, pws->h[5], pwt->h[5]);
+ pwd->h[6] = msa_div_u_df(DF_HALF, pws->h[6], pwt->h[6]);
+ pwd->h[7] = msa_div_u_df(DF_HALF, pws->h[7], pwt->h[7]);
+}
+
+void helper_msa_div_u_w(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_div_u_df(DF_WORD, pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_div_u_df(DF_WORD, pws->w[1], pwt->w[1]);
+ pwd->w[2] = msa_div_u_df(DF_WORD, pws->w[2], pwt->w[2]);
+ pwd->w[3] = msa_div_u_df(DF_WORD, pws->w[3], pwt->w[3]);
+}
+
+void helper_msa_div_u_d(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_div_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_div_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
+}
/*
@@ -2287,22 +2434,6 @@ static inline int64_t msa_mulv_df(uint32_t df, int64_t
arg1, int64_t arg2)
return arg1 * arg2;
}
-static inline int64_t msa_div_s_df(uint32_t df, int64_t arg1, int64_t arg2)
-{
- if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
- return DF_MIN_INT(df);
- }
- return arg2 ? arg1 / arg2
- : arg1 >= 0 ? -1 : 1;
-}
-
-static inline int64_t msa_div_u_df(uint32_t df, int64_t arg1, int64_t arg2)
-{
- uint64_t u_arg1 = UNSIGNED(arg1, df);
- uint64_t u_arg2 = UNSIGNED(arg2, df);
- return arg2 ? u_arg1 / u_arg2 : -1;
-}
-
static inline int64_t msa_mod_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
if (arg1 == DF_MIN_INT(df) && arg2 == -1) {
@@ -2523,8 +2654,6 @@ MSA_BINOP_DF(subsuu_s)
MSA_BINOP_DF(asub_s)
MSA_BINOP_DF(asub_u)
MSA_BINOP_DF(mulv)
-MSA_BINOP_DF(div_s)
-MSA_BINOP_DF(div_u)
MSA_BINOP_DF(mod_s)
MSA_BINOP_DF(mod_u)
MSA_BINOP_DF(dotp_s)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 4db87d6..27eca0a 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -28610,6 +28610,38 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext
*ctx)
break;
}
break;
+ case OPC_DIV_S_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_div_s_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_div_s_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_div_s_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_div_s_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
+ case OPC_DIV_U_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_div_u_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_div_u_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_div_u_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_div_u_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
case OPC_SLL_df:
gen_helper_msa_sll_df(cpu_env, tdf, twd, tws, twt);
break;
@@ -28691,9 +28723,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext
*ctx)
case OPC_ASUB_S_df:
gen_helper_msa_asub_s_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_DIV_S_df:
- gen_helper_msa_div_s_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_ILVL_df:
gen_helper_msa_ilvl_df(cpu_env, tdf, twd, tws, twt);
break;
@@ -28703,9 +28732,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext
*ctx)
case OPC_ASUB_U_df:
gen_helper_msa_asub_u_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_DIV_U_df:
- gen_helper_msa_div_u_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_ILVR_df:
gen_helper_msa_ilvr_df(cpu_env, tdf, twd, tws, twt);
break;
--
2.7.4
- [PULL 10/18] target/mips: msa: Split helpers for AVE_<S|U>.<B|H|W|D>, (continued)
- [PULL 10/18] target/mips: msa: Split helpers for AVE_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/10/01
- [PULL 11/18] target/mips: msa: Split helpers for AVER_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/10/01
- [PULL 07/18] target/mips: msa: Split helpers for BINS<L|R>.<B|H|W|D>, Aleksandar Markovic, 2019/10/01
- [PULL 03/18] target/mips: Clean up mips-defs.h, Aleksandar Markovic, 2019/10/01
- [PULL 12/18] target/mips: msa: Split helpers for CEQ.<B|H|W|D>, Aleksandar Markovic, 2019/10/01
- [PULL 05/18] target/mips: msa: Split helpers for <NLOC|NLZC>.<B|H|W|D>, Aleksandar Markovic, 2019/10/01
- [PULL 13/18] target/mips: msa: Split helpers for CLE_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/10/01
- [PULL 09/18] target/mips: msa: Split helpers for B<CLR|NEG|SEL>.<B|H|W|D>, Aleksandar Markovic, 2019/10/01
- [PULL 17/18] target/mips: msa: Simplify and move helper for MOVE.V, Aleksandar Markovic, 2019/10/01
- [PULL 18/18] target/mips: msa: Move helpers for <AND|NOR|OR|XOR>.V, Aleksandar Markovic, 2019/10/01
- [PULL 15/18] target/mips: msa: Split helpers for DIV_<S|U>.<B|H|W|D>,
Aleksandar Markovic <=
- [PULL 14/18] target/mips: msa: Split helpers for CLT_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/10/01
- [PULL 16/18] target/mips: msa: Split helpers for MOD_<S|U>.<B|H|W|D>, Aleksandar Markovic, 2019/10/01
- Re: [PULL 00/18] MIPS queue for October 1st, 2019, Peter Maydell, 2019/10/03