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[Qemu-devel] [PATCH 27/36] tcg: Check for watchpoints in probe_write()
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 27/36] tcg: Check for watchpoints in probe_write() |
Date: |
Tue, 3 Sep 2019 09:08:49 -0700 |
From: David Hildenbrand <address@hidden>
Let size > 0 indicate a promise to write to those bytes.
Check for write watchpoints in the probed range.
Suggested-by: Richard Henderson <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
[rth: Recompute index after tlb_fill; check TLB_WATCHPOINT.]
Signed-off-by: Richard Henderson <address@hidden>
---
accel/tcg/cputlb.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 9a9a626938..010c4c6e3c 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1086,13 +1086,24 @@ void probe_write(CPUArchState *env, target_ulong addr,
int size, int mmu_idx,
{
uintptr_t index = tlb_index(env, mmu_idx, addr);
CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr);
+ target_ulong tlb_addr = tlb_addr_write(entry);
- if (!tlb_hit(tlb_addr_write(entry), addr)) {
- /* TLB entry is for a different page */
+ if (unlikely(!tlb_hit(tlb_addr, addr))) {
if (!VICTIM_TLB_HIT(addr_write, addr)) {
tlb_fill(env_cpu(env), addr, size, MMU_DATA_STORE,
mmu_idx, retaddr);
+ /* TLB resize via tlb_fill may have moved the entry. */
+ index = tlb_index(env, mmu_idx, addr);
+ entry = tlb_entry(env, mmu_idx, addr);
}
+ tlb_addr = tlb_addr_write(entry);
+ }
+
+ /* Handle watchpoints. */
+ if ((tlb_addr & TLB_WATCHPOINT) && size > 0) {
+ cpu_check_watchpoint(env_cpu(env), addr, size,
+ env_tlb(env)->d[mmu_idx].iotlb[index].attrs,
+ BP_MEM_WRITE, retaddr);
}
}
--
2.17.1
- [Qemu-devel] [PATCH 18/36] target/sparc: Add TLB entry with attributes, (continued)
- [Qemu-devel] [PATCH 18/36] target/sparc: Add TLB entry with attributes, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 20/36] exec: Move user-only watchpoint stubs inline, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 21/36] exec: Factor out core logic of check_watchpoint(), Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 17/36] cputlb: Byte swap memory transaction attribute, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 24/36] cputlb: Fix size operand for tlb_fill on unaligned store, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 23/36] exec: Factor out cpu_watchpoint_address_matches, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 22/36] cputlb: Fold TLB_RECHECK into TLB_INVALID_MASK, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 25/36] cputlb: Remove double-alignment in store_helper, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 27/36] tcg: Check for watchpoints in probe_write(),
Richard Henderson <=
- [Qemu-devel] [PATCH 29/36] s390x/tcg: Fix length calculation in probe_write_access(), Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 26/36] cputlb: Handle watchpoints via TLB_WATCHPOINT, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 28/36] s390x/tcg: Use guest_addr_valid() instead of h2g_valid() in probe_write_access(), Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 30/36] tcg: Factor out CONFIG_USER_ONLY probe_write() from s390x code, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 31/36] tcg: Enforce single page access in probe_write(), Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 32/36] mips/tcg: Call probe_write() for CONFIG_USER_ONLY as well, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 33/36] hppa/tcg: Call probe_write() also for CONFIG_USER_ONLY, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 34/36] s390x/tcg: Pass a size to probe_write() in do_csst(), Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 35/36] tcg: Make probe_write() return a pointer to the host page, Richard Henderson, 2019/09/03
- [Qemu-devel] [PATCH 36/36] tcg: Factor out probe_write() logic into probe_access(), Richard Henderson, 2019/09/03