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Re: [Qemu-devel] [RFC v3] hw/sd/aspeed_sdhci: New device
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-devel] [RFC v3] hw/sd/aspeed_sdhci: New device |
Date: |
Mon, 2 Sep 2019 08:16:24 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 |
On 22/08/2019 11:17, Cédric Le Goater wrote:
> On 20/08/2019 21:02, Eddie James wrote:
>> The Aspeed SOCs have two SD/MMC controllers. Add a device that
>> encapsulates both of these controllers and models the Aspeed-specific
>> registers and behavior.
>>
>> Tested by reading from mmcblk0 in Linux:
>> qemu-system-arm -machine romulus-bmc -nographic \
>> -drive file=flash-romulus,format=raw,if=mtd \
>> -device sd-card,drive=sd0 -drive file=_tmp/kernel,format=raw,if=sd
>>
>> Signed-off-by: Eddie James <address@hidden>
>
> Reviewed-by: Cédric Le Goater <address@hidden>
>
>> ---
>> This patch applies on top of Cedric's set of recent Aspeed changes.
>> Therefore, I'm sending as an RFC rather than a patch for review.
>
> I merged this patch in aspeed-4.2 and made the adjustments to move
> it to the top of the patchset after the GPIO model.
Hello,
What would be required to the model under linux-5.2 ?
Thanks,
C.
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