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[Qemu-devel] [PULL 27/42] ppc/xive: Provide silent escalation support
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 27/42] ppc/xive: Provide silent escalation support |
Date: |
Wed, 21 Aug 2019 17:25:27 +1000 |
From: Cédric Le Goater <address@hidden>
When the 's' bit is set the escalation is said to be 'silent' or
'silent/gather'. In such configuration, the notification sequence is
skipped and only the escalation sequence is performed. This is used to
configure all the EQs of a vCPU to escalate on a single EQ which will
then target the hypervisor.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xive.c | 8 ++++++++
include/hw/ppc/xive_regs.h | 2 ++
2 files changed, 10 insertions(+)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 3fe84f3e76..dd7d02dfdf 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -1485,6 +1485,13 @@ static void xive_router_end_notify(XiveRouter *xrtr,
uint8_t end_blk,
xive_router_write_end(xrtr, end_blk, end_idx, &end, 1);
}
+ /*
+ * When the END is silent, we skip the notification part.
+ */
+ if (xive_end_is_silent_escalation(&end)) {
+ goto do_escalation;
+ }
+
/*
* The W7 format depends on the F bit in W6. It defines the type
* of the notification :
@@ -1564,6 +1571,7 @@ static void xive_router_end_notify(XiveRouter *xrtr,
uint8_t end_blk,
*/
}
+do_escalation:
/*
* If activated, escalate notification using the ESe PQ bits and
* the EAS in w4-5
diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
index 4378d7259c..fed019516f 100644
--- a/include/hw/ppc/xive_regs.h
+++ b/include/hw/ppc/xive_regs.h
@@ -212,6 +212,8 @@ typedef struct XiveEND {
#define xive_end_is_escalate(end) (be32_to_cpu((end)->w0) &
END_W0_ESCALATE_CTL)
#define xive_end_is_uncond_escalation(end) \
(be32_to_cpu((end)->w0) & END_W0_UNCOND_ESCALATE)
+#define xive_end_is_silent_escalation(end) \
+ (be32_to_cpu((end)->w0) & END_W0_SILENT_ESCALATE)
static inline uint64_t xive_end_qaddr(XiveEND *end)
{
--
2.21.0
- [Qemu-devel] [PULL 34/42] spapr/pci: Free MSIs during reset, (continued)
- [Qemu-devel] [PULL 34/42] spapr/pci: Free MSIs during reset, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 21/42] pseries: Update SLOF firmware image, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 37/42] spapr/xive: Mask the EAS when allocating an IRQ, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 25/42] ppc/xive: Provide escalation support, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 35/42] spapr/irq: Drop spapr_irq_msi_reset(), David Gibson, 2019/08/21
- [Qemu-devel] [PULL 28/42] ppc/xive: Improve 'info pic' support, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 36/42] spapr: Implement better workaround in spapr-vty device, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 38/42] target/ppc: Add Directed Privileged Door-bell Exception State (DPDES) SPR, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 30/42] i386: use machine class ->wakeup method, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 22/42] ppc/xive: use an abstract type for XiveNotifier, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 27/42] ppc/xive: Provide silent escalation support,
David Gibson <=
- [Qemu-devel] [PULL 41/42] ppc: Fix emulated INFINITY and NAN conversions, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 31/42] spapr: Implement ibm,suspend-me, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 24/42] ppc/xive: Provide backlog support, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 32/42] ppc: remove idle_timer logic, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 42/42] ppc: Fix emulated single to double denormalized conversions, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 40/42] ppc: conform to processor User's Manual for xscvdpspn, David Gibson, 2019/08/21
- [Qemu-devel] [PULL 39/42] ppc: Add support for 'mffsl' instruction, David Gibson, 2019/08/21
- Re: [Qemu-devel] [PULL 00/42] ppc-for-4.2 queue 20190821, no-reply, 2019/08/21
- Re: [Qemu-devel] [PULL 00/42] ppc-for-4.2 queue 20190821, Peter Maydell, 2019/08/21