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Re: [Qemu-devel] [PATCH v7 00/42] Invert Endian bit in SPARCv9 MMU TTE


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH v7 00/42] Invert Endian bit in SPARCv9 MMU TTE
Date: Sun, 18 Aug 2019 10:13:29 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0

On 8/16/19 7:28 AM, address@hidden wrote:
> Tony Nguyen (42):
>   configure: Define TARGET_ALIGNED_ONLY in configure
>   tcg: TCGMemOp is now accelerator independent MemOp
>   memory: Introduce size_memop
>   target/mips: Access MemoryRegion with MemOp
>   hw/s390x: Access MemoryRegion with MemOp
>   hw/intc/armv7m_nic: Access MemoryRegion with MemOp
>   hw/virtio: Access MemoryRegion with MemOp
>   hw/vfio: Access MemoryRegion with MemOp
>   exec: Access MemoryRegion with MemOp
>   cputlb: Access MemoryRegion with MemOp
>   memory: Access MemoryRegion with MemOp
>   hw/s390x: Hard code size with MO_{8|16|32|64}
>   target/mips: Hard code size with MO_{8|16|32|64}
>   exec: Hard code size with MO_{8|16|32|64}

I have queued these 14 patches to tcg-next:

  https://github.com/rth7680/qemu/tree/tcg-next

I agree with the downthread conversation with Phil that the middle device
patches should be split out to a different series.

I have some questions on some of the last few patches, and I don't know how
they would interact cherry-picking from those, so I've left them for now.

I had some trouble applying your patches, as they're encoded quoted-printable,
and "git am" doesn't like that.  If possible, please use "git send-email" to
post your next patch set.


r~



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