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Re: [Qemu-devel] [PATCH v5] target/arm: generate a custom MIDR for -cpu
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v5] target/arm: generate a custom MIDR for -cpu max |
Date: |
Mon, 29 Jul 2019 13:44:06 +0100 |
On Fri, 26 Jul 2019 at 12:39, Alex Bennée <address@hidden> wrote:
>
> While most features are now detected by probing the ID_* registers
> kernels can (and do) use MIDR_EL1 for working out of they have to
> apply errata. This can trip up warnings in the kernel as it tries to
> work out if it should apply workarounds to features that don't
> actually exist in the reported CPU type.
>
> Avoid this problem by synthesising our own MIDR value.
>
> Signed-off-by: Alex Bennée <address@hidden>
> Reviewed-by: Peter Maydell <address@hidden>
>
> ---
> v2
> - don't leak QEMU version into ID reg
> v3
> - move comment into one block
> - explicit setting of more fields
> v4
> - minor reword of comment
> v5
> - VARIANT->PARTNUM and extra words
Applied to target-arm.next for 4.2, thanks.
-- PMM