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Re: [Qemu-devel] [PATCH for 4.2] target/arm: generate a custom MIDR for
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH for 4.2] target/arm: generate a custom MIDR for -cpu max |
Date: |
Fri, 26 Jul 2019 09:44:33 +0100 |
On Fri, 26 Jul 2019 at 08:37, Laurent Desnogues
<address@hidden> wrote:
> On Fri, Jul 26, 2019 at 9:24 AM Alex Bennée <address@hidden> wrote:
> > Peter Maydell <address@hidden> writes:
> > > I wonder if we should put 0x51 (ascii 'Q') in the PARTNUM field;
> > > then if somebody really needs to distinguish QEMU from random
> > > other software-models they have a way to do it.
> >
> > Q is reserved for Qualcomm - It would be nice if ARM could assign QEMU a
> > code but I suspect that's not part of the business model.
>
> That was my reaction at first too, but that Q is reserved for the
> Implementer field, while Peter is proposing to put it in the PartNum
> field :-)
Yes; I should have been a bit clearer... This is totally ad-hoc,
of course, and I have no idea what other models might be using
IMPLEMENTER==0, but it seems harmless enough and it might come
in useful someday.
thanks
-- PMM