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[Qemu-devel] [PATCH v4 15/15] target/sparc: sun4u Invert Endian TTE bit
From: |
tony.nguyen |
Subject: |
[Qemu-devel] [PATCH v4 15/15] target/sparc: sun4u Invert Endian TTE bit |
Date: |
Thu, 25 Jul 2019 09:57:55 +0000 |
This bit configures endianness of PCI MMIO devices. It is used by
Solaris and OpenBSD sunhme drivers.
Tested working on OpenBSD.
Unfortunately Solaris 10 had a unrelated keyboard issue blocking
testing... another inch towards Solaris 10 on SPARC64 =)
Signed-off-by: Tony Nguyen <address@hidden>
---
target/sparc/cpu.h | 2 ++
target/sparc/mmu_helper.c | 8 +++++++-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h
index 8ed2250..77e8e07 100644
--- a/target/sparc/cpu.h
+++ b/target/sparc/cpu.h
@@ -277,6 +277,7 @@ enum {
#define TTE_VALID_BIT (1ULL << 63)
#define TTE_NFO_BIT (1ULL << 60)
+#define TTE_IE_BIT (1ULL << 59)
#define TTE_USED_BIT (1ULL << 41)
#define TTE_LOCKED_BIT (1ULL << 6)
#define TTE_SIDEEFFECT_BIT (1ULL << 3)
@@ -293,6 +294,7 @@ enum {
#define TTE_IS_VALID(tte) ((tte) & TTE_VALID_BIT)
#define TTE_IS_NFO(tte) ((tte) & TTE_NFO_BIT)
+#define TTE_IS_IE(tte) ((tte) & TTE_IE_BIT)
#define TTE_IS_USED(tte) ((tte) & TTE_USED_BIT)
#define TTE_IS_LOCKED(tte) ((tte) & TTE_LOCKED_BIT)
#define TTE_IS_SIDEEFFECT(tte) ((tte) & TTE_SIDEEFFECT_BIT)
diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c
index 826e14b..77dc86a 100644
--- a/target/sparc/mmu_helper.c
+++ b/target/sparc/mmu_helper.c
@@ -537,6 +537,10 @@ static int get_physical_address_data(CPUSPARCState *env,
hwaddr *physical,
if (ultrasparc_tag_match(&env->dtlb[i], address, context, physical)) {
int do_fault = 0;
+ if (TTE_IS_IE(env->dtlb[i].tte)) {
+ attrs->byte_swap = true;
+ }
+
/* access ok? */
/* multiple bits in SFSR.FT may be set on TT_DFAULT */
if (TTE_IS_PRIV(env->dtlb[i].tte) && is_user) {
@@ -792,7 +796,7 @@ void dump_mmu(CPUSPARCState *env)
}
if (TTE_IS_VALID(env->dtlb[i].tte)) {
qemu_printf("[%02u] VA: %" PRIx64 ", PA: %llx"
- ", %s, %s, %s, %s, ctx %" PRId64 " %s\n",
+ ", %s, %s, %s, %s, ie %s, ctx %" PRId64 " %s\n",
i,
env->dtlb[i].tag & (uint64_t)~0x1fffULL,
TTE_PA(env->dtlb[i].tte),
@@ -801,6 +805,8 @@ void dump_mmu(CPUSPARCState *env)
TTE_IS_W_OK(env->dtlb[i].tte) ? "RW" : "RO",
TTE_IS_LOCKED(env->dtlb[i].tte) ?
"locked" : "unlocked",
+ TTE_IS_IE(env->dtlb[i].tte) ?
+ "yes" : "no",
env->dtlb[i].tag & (uint64_t)0x1fffULL,
TTE_IS_GLOBAL(env->dtlb[i].tte) ?
"global" : "local");
--
1.8.3.1
- Re: [Qemu-devel] [PATCH v4 08/15] exec: Access MemoryRegion with MemOp, (continued)
- [Qemu-devel] [PATCH v4 09/15] cputlb: Access MemoryRegion with MemOp, tony.nguyen, 2019/07/25
- [Qemu-devel] [PATCH v4 10/15] memory: Access MemoryRegion with MemOp semantics, tony.nguyen, 2019/07/25
- [Qemu-devel] [PATCH v4 11/15] memory: Single byte swap along the I/O path, tony.nguyen, 2019/07/25
- [Qemu-devel] [PATCH v4 12/15] cpu: TLB_FLAGS_MASK bit to force memory slow path, tony.nguyen, 2019/07/25
- [Qemu-devel] [PATCH v4 13/15] cputlb: Byte swap memory transaction attribute, tony.nguyen, 2019/07/25
- [Qemu-devel] [PATCH v4 14/15] target/sparc: Add TLB entry with attributes, tony.nguyen, 2019/07/25
- [Qemu-devel] [PATCH v4 15/15] target/sparc: sun4u Invert Endian TTE bit,
tony.nguyen <=