[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH v2] target/i386: Introduce Denverton CPU model

From: Xiaoyao Li
Subject: Re: [Qemu-devel] [PATCH v2] target/i386: Introduce Denverton CPU model
Date: Thu, 18 Jul 2019 14:16:14 +0800
User-agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0

On 7/18/2019 9:56 AM, Tao Xu wrote:
On 7/18/2019 2:38 AM, Eduardo Habkost wrote:
On Wed, Jul 17, 2019 at 01:39:01PM +0800, Tao Xu wrote:
Hi Eduardo,

Could I ask a question about introducing a old CPU model? Maybe not so old because it was launched in 2017. It is the former generation (Atom Server)
of Snowridge and if this cpu model be added, qemu may can migrate guest
between Denverton CPU and Snowridge CPU.

I am wondering which way is more appropriate, because maybe there are a few
Denverton machines using old microcodes:

1. Just like this patch, introduce one version cpu cpu model.

2. Introduce multi versions of cpu model, cover old microcodes, may be 3

What exactly are the differences between the old and new
microcodes?  Is it always possible to install a new microcode on
machines that are not up to date?

Denverton Machines with old microcodes didn't have CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD on host. But user can update their machine follow the links below:



Both options look good to me.  I think it's OK to just declare
old microcode versions as not supported by QEMU, but I won't
complain if you decide to add multiple versions.

Thank you Eduardo, I prefer option 1, just this patch. I think because Denverton CPU model will not have compatibility issue and the machines with old microcode are very few.

Hi Tao,

This patch also define CPUID_7_0_EDX_ARCH_CAPABILITIES in features[FEAT_7_0_EDX], but there is no feature defined with .feature[FEAT_ARCH_CAPABILITIES] in this cpu model. Do you miss some features enumerated by MSR_IA32_ARCH_CAPABILITIES in this cpu model? Otherwise it can just remove CPUID_7_0_EDX_ARCH_CAPABILITIES.

On 7/17/2019 12:57 PM, Tao Xu wrote:
Denverton is the Atom Processor of Intel Harrisonville platform.
+        .features[FEAT_7_0_EDX] =
+            CPUID_7_0_EDX_SPEC_CTRL_SSBD,
+        /*
+         * Missing: XSAVES (not supported by some Linux versions,
+         * including v4.1 to v4.12).
+         * KVM doesn't yet expose any XSAVES state save component,
+         * and the only one defined in Skylake (processor tracing)
+         * probably will block migration anyway.
+         */
+        .features[FEAT_XSAVE] =
+        .features[FEAT_6_EAX] =
+            CPUID_6_EAX_ARAT,
+        .xlevel = 0x80000008,
+        .model_id = "Intel Atom Processor (Denverton)",
+    },
           .name = "SnowRidge-Server",
           .level = 27,

reply via email to

[Prev in Thread] Current Thread [Next in Thread]