[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 3/4] cputlb: Byte swap memory transaction attrib
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 3/4] cputlb: Byte swap memory transaction attribute |
Date: |
Wed, 17 Jul 2019 07:29:10 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.7.2 |
On 7/16/19 11:08 PM, address@hidden wrote:
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index baa61719ad..11debb7dda 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -731,7 +731,7 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong
> vaddr,
> vaddr, paddr, prot, mmu_idx);
>
> address = vaddr_page;
> - if (size < TARGET_PAGE_SIZE) {
> + if (size < TARGET_PAGE_SIZE || attrs.byte_swap) {
I don't think you want to re-use TLB_RECHECK. This operation requires the
slow-path, yes, but not another call into cpu->cc->tlb_fill.
r~
- [Qemu-devel] [PATCH 0/4] Invert Endian bit in SPARCv9 MMU TTE, tony.nguyen, 2019/07/17
- [Qemu-devel] [PATCH 1/4] tcg: TCGMemOp is now accelerator independent MemOp, tony.nguyen, 2019/07/17
- [Qemu-devel] [PATCH 2/4] memory: Single byte swap along the I/O path, tony.nguyen, 2019/07/17
- [Qemu-devel] [PATCH 4/4] target/sparc: sun4u Invert Endian TTE bit, tony.nguyen, 2019/07/17
- [Qemu-devel] [PATCH 3/4] cputlb: Byte swap memory transaction attribute, tony.nguyen, 2019/07/17
- Re: [Qemu-devel] [PATCH 3/4] cputlb: Byte swap memory transaction attribute,
Richard Henderson <=
- Re: [Qemu-devel] [PATCH 0/4] Invert Endian bit in SPARCv9 MMU TTE, Paolo Bonzini, 2019/07/17