[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-devel] [PATCH for 4.1 v3 2/5] target/mips: Add missing 'break' for

From: Aleksandar Markovic
Subject: [Qemu-devel] [PATCH for 4.1 v3 2/5] target/mips: Add missing 'break' for a case of MTHC0 handling
Date: Mon, 15 Jul 2019 21:53:23 +0200

From: Aleksandar Markovic <address@hidden>

This was found by GCC 8.3 static analysis.

Fixes: 5fb2dcd1792

Reported-by: Stefan Weil <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
 target/mips/translate.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 2be5e2d..59d4acd 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -6745,6 +6745,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int 
reg, int sel)
             goto cp0_unimplemented;
+        break;
     case CP0_REGISTER_17:
         switch (sel) {
         case 0:

reply via email to

[Prev in Thread] Current Thread [Next in Thread]