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Re: [Qemu-devel] RFC: Why does target/m68k RTE insn. use gen_exception

From: Lucien Murray-Pitts
Subject: Re: [Qemu-devel] RFC: Why does target/m68k RTE insn. use gen_exception
Date: Thu, 11 Jul 2019 02:50:47 +0900

> On Wed, Jul 10, 2019 at 4:04 AM Richard Henderson <
address@hidden> wrote:

> > I did have a suggestion.  It was fairly detailed.
> > https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg06522.html
> Your solution is elegant at about 10 lines that return getl_ilen(pc), but
it seems the s390 has a far simpler
instruction word format than the m68k.

However then that got me to thinking, it seems that we can call a portion
of the TCG system to disassemble a single instruction.
    TranslationBlock tb;
    tb.pc = env->pc;
    gen_intermediate_code(cs, &tb, /* max isn */ 1);
    int ilen = tb.size;
    printf( "PC: %08x sz:%08x\n", env->pc, tb, ilen ) ;

I am very new to TCG, so it does seem there is a lot of code in the
translator_loop that appears to be interacting with the CPU model/state.
Should I be worried about this, or is this a safe function to call outside
of the translator core proper?
(if everyone is too busy I can dig by myself but I think its going to take
some time)


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