Re: [Qemu-devel] [PATCH] tcg/aarch64: Fix output of extract2 opcodes

[Richard Henderson]

On Wed, 10 Jul 2019 at 11:22, Aleksandar Markovic
<address@hidden> wrote:
> On Jul 9, 2019 8:56 PM, "Richard Henderson" <address@hidden> wrote:
> >
> > The aarch64 argument ordering for the operands is big-endian,
> > whereas the tcg argument ordering is little-endian.  Use REG0
> > so that we honor the rZ constraints.
> >
> > Fixes: 464c2969d5d
> > Reported-by: Peter Maydell <address@hidden>
> > Signed-off-by: Richard Henderson <address@hidden>
> > ---
>
> The commit message looks more like a list of some random items than logical 
> explanation of the code change. Improve it.

Vague and non-constructive comments like this are and will continue to
be ignored.

If you want to review a patch, then you're going to have to actually
read it.  There are two obvious changes in the one line patch.  Each
sentence describes the reason for each change.  There is no subtle
complex problem here.

r~

>
> Regards,
> Aleksandar
>
> >  tcg/aarch64/tcg-target.inc.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
> > index b0f8106642..0713448bf5 100644
> > --- a/tcg/aarch64/tcg-target.inc.c
> > +++ b/tcg/aarch64/tcg-target.inc.c
> > @@ -2226,7 +2226,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
> >
> >      case INDEX_op_extract2_i64:
> >      case INDEX_op_extract2_i32:
> > -        tcg_out_extr(s, ext, a0, a1, a2, args[3]);
> > +        tcg_out_extr(s, ext, a0, REG0(2), REG0(1), args[3]);
> >          break;
> >
> >      case INDEX_op_add2_i32:
> > --
> > 2.17.1
> >
> >