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[Qemu-devel] [PULL v5 07/43] hw/i386: Replace global smp variables with
From: |
Eduardo Habkost |
Subject: |
[Qemu-devel] [PULL v5 07/43] hw/i386: Replace global smp variables with machine smp properties |
Date: |
Wed, 3 Jul 2019 18:07:45 -0300 |
From: Like Xu <address@hidden>
The global smp variables in i386 are replaced with smp machine properties.
To avoid calling qdev_get_machine() as much as possible, some related funtions
for acpi data generations are refactored. No semantic changes.
A local variable of the same name would be introduced in the declaration
phase if it's used widely in the context OR replace it on the spot if it's
only used once. No semantic changes.
Signed-off-by: Like Xu <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Eduardo Habkost <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>
---
hw/i386/acpi-build.c | 11 +++++++----
hw/i386/kvmvapic.c | 7 +++++--
hw/i386/pc.c | 24 +++++++++++++++---------
hw/i386/xen/xen-hvm.c | 4 ++++
target/i386/cpu.c | 4 +++-
5 files changed, 34 insertions(+), 16 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 8ae7d88b11..d281ffa89e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -43,6 +43,7 @@
#include "sysemu/tpm.h"
#include "hw/acpi/tpm.h"
#include "hw/acpi/vmgenid.h"
+#include "hw/boards.h"
#include "sysemu/tpm_backend.h"
#include "hw/timer/mc146818rtc_regs.h"
#include "hw/mem/memory-device.h"
@@ -123,7 +124,8 @@ typedef struct FwCfgTPMConfig {
static bool acpi_get_mcfg(AcpiMcfgInfo *mcfg);
-static void init_common_fadt_data(Object *o, AcpiFadtData *data)
+static void init_common_fadt_data(MachineState *ms, Object *o,
+ AcpiFadtData *data)
{
uint32_t io = object_property_get_uint(o, ACPI_PM_PROP_PM_IO_BASE, NULL);
AmlAddressSpace as = AML_AS_SYSTEM_IO;
@@ -139,7 +141,8 @@ static void init_common_fadt_data(Object *o, AcpiFadtData
*data)
* CPUs for more than 8 CPUs, "Clustered Logical" mode has to be
* used
*/
- ((max_cpus > 8) ? (1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL) : 0),
+ ((ms->smp.max_cpus > 8) ?
+ (1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL) : 0),
.int_model = 1 /* Multiple APIC */,
.rtc_century = RTC_CENTURY,
.plvl2_lat = 0xfff /* C2 state not supported */,
@@ -173,7 +176,7 @@ static Object *object_resolve_type_unambiguous(const char
*typename)
return o;
}
-static void acpi_get_pm_info(AcpiPmInfo *pm)
+static void acpi_get_pm_info(MachineState *machine, AcpiPmInfo *pm)
{
Object *piix = object_resolve_type_unambiguous(TYPE_PIIX4_PM);
Object *lpc = object_resolve_type_unambiguous(TYPE_ICH9_LPC_DEVICE);
@@ -2612,7 +2615,7 @@ void acpi_build(AcpiBuildTables *tables, MachineState
*machine)
AcpiSlicOem slic_oem = { .id = NULL, .table_id = NULL };
Object *vmgenid_dev;
- acpi_get_pm_info(&pm);
+ acpi_get_pm_info(machine, &pm);
acpi_get_misc_info(&misc);
acpi_get_pci_holes(&pci_hole, &pci_hole64);
acpi_get_slic_oem(&slic_oem);
diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
index ca8df462b6..9c2ab4aac5 100644
--- a/hw/i386/kvmvapic.c
+++ b/hw/i386/kvmvapic.c
@@ -18,6 +18,7 @@
#include "sysemu/kvm.h"
#include "hw/i386/apic_internal.h"
#include "hw/sysbus.h"
+#include "hw/boards.h"
#include "tcg/tcg.h"
#define VAPIC_IO_PORT 0x7e
@@ -442,11 +443,12 @@ static void do_patch_instruction(CPUState *cs,
run_on_cpu_data data)
static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
CPUState *cs = CPU(cpu);
VAPICHandlers *handlers;
PatchInfo *info;
- if (smp_cpus == 1) {
+ if (ms->smp.cpus == 1) {
handlers = &s->rom_state.up;
} else {
handlers = &s->rom_state.mp;
@@ -747,6 +749,7 @@ static void do_vapic_enable(CPUState *cs, run_on_cpu_data
data)
static void kvmvapic_vm_state_change(void *opaque, int running,
RunState state)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
VAPICROMState *s = opaque;
uint8_t *zero;
@@ -755,7 +758,7 @@ static void kvmvapic_vm_state_change(void *opaque, int
running,
}
if (s->state == VAPIC_ACTIVE) {
- if (smp_cpus == 1) {
+ if (ms->smp.cpus == 1) {
run_on_cpu(first_cpu, do_vapic_enable, RUN_ON_CPU_HOST_PTR(s));
} else {
zero = g_malloc0(s->rom_state.vapic_size);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index da1cdd6853..73de30cc20 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -928,12 +928,14 @@ void enable_compat_apic_id_mode(void)
* no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
* all CPUs up to max_cpus.
*/
-static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
+static uint32_t x86_cpu_apic_id_from_index(MachineState *ms,
+ unsigned int cpu_index)
{
uint32_t correct_id;
static bool warned;
- correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
+ correct_id = x86_apicid_from_cpu_idx(ms->smp.cores,
+ ms->smp.threads, cpu_index);
if (compat_apic_id_mode) {
if (cpu_index != correct_id && !warned && !qtest_enabled()) {
error_report("APIC IDs set in compatibility mode, "
@@ -1532,7 +1534,7 @@ static void pc_new_cpu(const char *typename, int64_t
apic_id, Error **errp)
void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp)
{
- int64_t apic_id = x86_cpu_apic_id_from_index(id);
+ int64_t apic_id = x86_cpu_apic_id_from_index(ms, id);
Error *local_err = NULL;
if (id < 0) {
@@ -1568,9 +1570,10 @@ void pc_cpus_init(PCMachineState *pcms)
*
* This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
*/
- pcms->apic_id_limit = x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
+ pcms->apic_id_limit = x86_cpu_apic_id_from_index(ms,
+ ms->smp.max_cpus - 1) + 1;
possible_cpus = mc->possible_cpu_arch_ids(ms);
- for (i = 0; i < smp_cpus; i++) {
+ for (i = 0; i < ms->smp.cpus; i++) {
pc_new_cpu(possible_cpus->cpus[i].type, possible_cpus->cpus[i].arch_id,
&error_fatal);
}
@@ -2294,6 +2297,8 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
X86CPU *cpu = X86_CPU(dev);
MachineState *ms = MACHINE(hotplug_dev);
PCMachineState *pcms = PC_MACHINE(hotplug_dev);
+ unsigned int smp_cores = ms->smp.cores;
+ unsigned int smp_threads = ms->smp.threads;
if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) {
error_setg(errp, "Invalid CPU type, expected cpu type: '%s'",
@@ -2303,7 +2308,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
/* if APIC ID is not set, set it based on socket/core/thread properties */
if (cpu->apic_id == UNASSIGNED_APIC_ID) {
- int max_socket = (max_cpus - 1) / smp_threads / smp_cores;
+ int max_socket = (ms->smp.max_cpus - 1) / smp_threads / smp_cores;
if (cpu->socket_id < 0) {
error_setg(errp, "CPU socket-id is not set");
@@ -2653,13 +2658,14 @@ static int64_t pc_get_default_cpu_node_id(const
MachineState *ms, int idx)
assert(idx < ms->possible_cpus->len);
x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
- smp_cores, smp_threads, &topo);
+ ms->smp.cores, ms->smp.threads, &topo);
return topo.pkg_id % nb_numa_nodes;
}
static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms)
{
int i;
+ unsigned int max_cpus = ms->smp.max_cpus;
if (ms->possible_cpus) {
/*
@@ -2678,9 +2684,9 @@ static const CPUArchIdList
*pc_possible_cpu_arch_ids(MachineState *ms)
ms->possible_cpus->cpus[i].type = ms->cpu_type;
ms->possible_cpus->cpus[i].vcpus_count = 1;
- ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(i);
+ ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(ms, i);
x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
- smp_cores, smp_threads, &topo);
+ ms->smp.cores, ms->smp.threads, &topo);
ms->possible_cpus->cpus[i].props.has_socket_id = true;
ms->possible_cpus->cpus[i].props.socket_id = topo.pkg_id;
ms->possible_cpus->cpus[i].props.has_core_id = true;
diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c
index 469f1260a4..e8e79e0917 100644
--- a/hw/i386/xen/xen-hvm.c
+++ b/hw/i386/xen/xen-hvm.c
@@ -756,6 +756,8 @@ static ioreq_t *cpu_get_ioreq_from_shared_memory(XenIOState
*state, int vcpu)
/* retval--the number of ioreq packet */
static ioreq_t *cpu_get_ioreq(XenIOState *state)
{
+ MachineState *ms = MACHINE(qdev_get_machine());
+ unsigned int max_cpus = ms->smp.max_cpus;
int i;
evtchn_port_t port;
@@ -1383,6 +1385,8 @@ static int xen_map_ioreq_server(XenIOState *state)
void xen_hvm_init(PCMachineState *pcms, MemoryRegion **ram_memory)
{
+ MachineState *ms = MACHINE(pcms);
+ unsigned int max_cpus = ms->smp.max_cpus;
int i, rc;
xen_pfn_t ioreq_pfn;
XenIOState *state;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 2a9f4e2d12..4b5cd49338 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -56,6 +56,7 @@
#include "hw/hw.h"
#include "hw/xen/xen.h"
#include "hw/i386/apic_internal.h"
+#include "hw/boards.h"
#endif
#include "disas/capstone.h"
@@ -5384,9 +5385,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error
**errp)
}
#ifndef CONFIG_USER_ONLY
+ MachineState *ms = MACHINE(qdev_get_machine());
qemu_register_reset(x86_cpu_machine_reset_cb, cpu);
- if (cpu->env.features[FEAT_1_EDX] & CPUID_APIC || smp_cpus > 1) {
+ if (cpu->env.features[FEAT_1_EDX] & CPUID_APIC || ms->smp.cpus > 1) {
x86_cpu_apic_create(cpu, &local_err);
if (local_err != NULL) {
goto out;
--
2.18.0.rc1.1.g3f1ff2140
- [Qemu-devel] [PULL v5 00/43] Machine and x86 queue, 2019-07-03, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 01/43] hw/boards: Add struct CpuTopology to MachineState, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 02/43] machine: Refactor smp-related call chains to pass MachineState, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 03/43] general: Replace global smp variables with smp machine properties, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 04/43] hw/ppc: Replace global smp variables with machine smp properties, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 05/43] hw/riscv: Replace global smp variables with machine smp properties, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 06/43] hw/s390x: Replace global smp variables with machine smp properties, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 08/43] hw/arm: Replace global smp variables with machine smp properties, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 07/43] hw/i386: Replace global smp variables with machine smp properties,
Eduardo Habkost <=
- [Qemu-devel] [PULL v5 13/43] i386/cpu: Consolidate die-id validity in smp context, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 09/43] hw: Replace global smp variables with MachineState for all remaining archs, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 11/43] i386: Add die-level cpu topology to x86CPU on PCMachine, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 18/43] numa: deprecate implict memory distribution between nodes, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 16/43] machine: show if CLI option '-numa node, mem' is supported in QAPI schema, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 25/43] x86/cpu: use FeatureWordArray to define filtered_features, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 22/43] i386: Don't print warning if phys-bits was set automatically, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 21/43] deprecate -mem-path fallback to anonymous RAM, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 10/43] vl.c: Replace smp global variables with smp machine properties, Eduardo Habkost, 2019/07/03
- [Qemu-devel] [PULL v5 15/43] pc: fix possible NULL pointer dereference in pc_machine_get_device_memory_region_size(), Eduardo Habkost, 2019/07/03