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[Qemu-devel] [PATCH for-4.1] xics/kvm: Always set the MASKED bit if inte

From: Greg Kurz
Subject: [Qemu-devel] [PATCH for-4.1] xics/kvm: Always set the MASKED bit if interrupt is masked
Date: Wed, 03 Jul 2019 19:22:20 +0200
User-agent: StGit/unknown-version

The ics_set_kvm_state_one() function is called either to restore the
state of an interrupt source during migration or to set the interrupt
source to a default state during reset.

Since always, ie. 2013, the code only sets the MASKED bit if the 'current
priority' and the 'saved priority' are different. This is likely true
when restoring an interrupt that had been previously masked with the
ibm,int-off RTAS call. However this is always false in the case of
reset since both 'current priority' and 'saved priority' are equal to
0xff, and the MASKED bit is never set.

The legacy KVM XICS device gets away with that because it ends updating
its internal structure the same way, whether the MASKED bit is set or
the priority is 0xff.

The XICS-on-XIVE device for POWER9 is different. It sticks to the KVM
documentation [1] and _really_ relies on the MASKED bit to correctly
set. If not, it will configure the interrupt source in the XIVE HW, even
though the guest hasn't configured the interrupt yet. This disturbs the
complex logic implemented in XICS-on-XIVE and may result in the loss of
subsequent queued events.

Always set the MASKED bit if interrupt is masked as expected by the KVM
XICS-on-XIVE device. This has no impact on the legacy KVM XICS.


Signed-off-by: Greg Kurz <address@hidden>
 hw/intc/xics_kvm.c |    3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 51433b19b076..2df1f3e92c7e 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -257,6 +257,9 @@ int ics_set_kvm_state_one(ICSState *ics, int srcno, Error 
     if (irq->priority != irq->saved_priority) {
         assert(irq->priority == 0xff);
+    }
+    if (irq->priority == 0xff) {
         state |= KVM_XICS_MASKED;

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