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[Qemu-devel] [PATCH v2 1/4] target/riscv: Fix PMP range boundary address
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PATCH v2 1/4] target/riscv: Fix PMP range boundary address bug |
Date: |
Mon, 24 Jun 2019 16:42:30 -0700 |
From: Dayeol Lee <address@hidden>
A wrong address is passed to `pmp_is_in_range` while checking if a
memory access is within a PMP range.
Since the ending address of the pmp range (i.e., pmp_state.addr[i].ea)
is set to the last address in the range (i.e., pmp base + pmp size - 1),
memory accesses containg the last address in the range will always fail.
For example, assume that a PMP range is 4KB from 0x87654000 such that
the last address within the range is 0x87654fff.
1-byte access to 0x87654fff should be considered to be fully inside the
PMP range.
However the access now fails and complains partial inclusion because
pmp_is_in_range(env, i, addr + size) returns 0 whereas
pmp_is_in_range(env, i, addr) returns 1.
Signed-off-by: Dayeol Lee <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Michael Clark <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
---
target/riscv/pmp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index fed1c3c030..e0fe206407 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -245,7 +245,7 @@ bool pmp_hart_has_privs(CPURISCVState *env, target_ulong
addr,
from low to high */
for (i = 0; i < MAX_RISCV_PMPS; i++) {
s = pmp_is_in_range(env, i, addr);
- e = pmp_is_in_range(env, i, addr + size);
+ e = pmp_is_in_range(env, i, addr + size - 1);
/* partially inside */
if ((s + e) == 1) {
--
2.22.0
- [Qemu-devel] [PATCH v2 0/4] Miscellaneous patches from the RISC-V fork, Alistair Francis, 2019/06/24
- [Qemu-devel] [PATCH v2 1/4] target/riscv: Fix PMP range boundary address bug,
Alistair Francis <=
- [Qemu-devel] [PATCH v2 3/4] disas/riscv: Fix `rdinstreth` constraint, Alistair Francis, 2019/06/24
- [Qemu-devel] [PATCH v2 2/4] disas/riscv: Disassemble reserved compressed encodings as illegal, Alistair Francis, 2019/06/24
- [Qemu-devel] [PATCH v2 4/4] target/riscv: Implement riscv_cpu_unassigned_access, Alistair Francis, 2019/06/24
- Re: [Qemu-devel] [PATCH v2 0/4] Miscellaneous patches from the RISC-V fork, no-reply, 2019/06/24
- Re: [Qemu-devel] [PATCH v2 0/4] Miscellaneous patches from the RISC-V fork, Palmer Dabbelt, 2019/06/25