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Re: [Qemu-devel] [PATCH v21 4/7] target/avr: Add instruction translation


From: Michael Rolnik
Subject: Re: [Qemu-devel] [PATCH v21 4/7] target/avr: Add instruction translation
Date: Tue, 11 Jun 2019 23:21:43 +0300

Hi Richard.

I merged all you fixes and I get an assert(use_icount) in cpu_loop_exec_tb
function, it happens on an instruction following SBRC.
what might cause it?

On Tue, Jun 11, 2019 at 12:20 AM Richard Henderson <
address@hidden> wrote:

> On 6/6/19 12:30 PM, Michael Rolnik wrote:
> > +        if (ctx.check_skip > 0) {
> > +            TCGLabel *skip = gen_new_label();
> > +            TCGLabel *done = gen_new_label();
> > +
> > +            tcg_gen_brcondi_tl(TCG_COND_NE, cpu_skip, 0, skip);
> > +                translate(&ctx);
> > +                tcg_gen_br(done);
> > +            gen_set_label(skip);
> > +                tcg_gen_movi_tl(cpu_skip, 0);
> > +                tcg_gen_movi_tl(cpu_pc, ctx.npc);
> > +            gen_set_label(done);
> > +            ctx.check_skip--;
> > +        } else {
> > +            translate(&ctx);
> > +        }
>
> In future, do not indent code like this.
>
> I had been thinking of a slightly more complex solution that does not
> require
> every TB to begin with a conditional branch testing cpu_skip.  This also
> has
> the property that we almost never write to cpu_skip at all -- the
> condition is
> consumed immediately within host registers without being written back to
> ENV.
> The only time we do write to cpu_skip is for debugging, single-stepping, or
> when we are forced to break the TB for other unusual reasons.
>
> The following implements this solution.  It's based on some other cleanups
> that
> I have made, and commented upon here.  The full tree can be found at
>
>   https://github.com/rth7680/qemu/commits/review/avr-21
>
>
> r~
>


-- 
Best Regards,
Michael Rolnik


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