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[Qemu-devel] [PATCH v19 15/21] hw/rx: Honor -accel qtest
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-devel] [PATCH v19 15/21] hw/rx: Honor -accel qtest |
Date: |
Tue, 11 Jun 2019 13:37:25 +0200 |
From: Richard Henderson <address@hidden>
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Yoshinori Sato <address@hidden>
Message-Id: <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
We could squash this with the previous patch
---
hw/rx/rx62n.c | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c
index 74d2fd0ee3..05d82d0b8f 100644
--- a/hw/rx/rx62n.c
+++ b/hw/rx/rx62n.c
@@ -21,11 +21,13 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu/error-report.h"
#include "hw/hw.h"
#include "hw/rx/rx62n.h"
#include "hw/loader.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
+#include "sysemu/qtest.h"
#include "cpu.h"
/*
@@ -190,8 +192,14 @@ static void rx62n_realize(DeviceState *dev, Error **errp)
memory_region_init_rom(&s->c_flash, NULL, "codeflash",
RX62N_CFLASH_SIZE, errp);
memory_region_add_subregion(s->sysmem, RX62N_CFLASH_BASE, &s->c_flash);
+
if (!s->kernel) {
- rom_add_file_fixed(bios_name, RX62N_CFLASH_BASE, 0);
+ if (bios_name) {
+ rom_add_file_fixed(bios_name, RX62N_CFLASH_BASE, 0);
+ } else if (!qtest_enabled()) {
+ error_report("No bios or kernel specified");
+ exit(1);
+ }
}
/* Initialize CPU */
--
2.20.1
- [Qemu-devel] [PATCH v19 14/21] hw/rx: RX Target hardware definition, (continued)
- [Qemu-devel] [PATCH v19 14/21] hw/rx: RX Target hardware definition, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 19/21] Add rx-softmmu, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 16/21] hw/rx: Restrict the RX62N microcontroller to the RX62N CPU core, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 18/21] hw/registerfields.h: Add 8bit and 16bit register macros, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 13/21] hw/char: RX62N serial communication interface (SCI), Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 08/21] target/rx: Emit all disassembly in one prt(), Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 01/21] target/rx: TCG translation, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 04/21] target/rx: RX disassembler, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 06/21] target/rx: Replace operand with prt_ldmi in disassembler, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 17/21] qemu/bitops.h: Add extract8 and extract16, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 15/21] hw/rx: Honor -accel qtest,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCH v19 12/21] hw/timer: RX62N internal timer modules, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 11/21] hw/intc: RX62N interrupt controller (ICUa), Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 07/21] target/rx: Use prt_ldmi for XCHG_mr disassembly, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 02/21] target/rx: TCG helper, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 05/21] target/rx: Disassemble rx_index_addr into a string, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 10/21] target/rx: Dump bytes for each insn during disassembly, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 09/21] target/rx: Collect all bytes during disassembly, Philippe Mathieu-Daudé, 2019/06/11
- [Qemu-devel] [PATCH v19 03/21] target/rx: CPU definition, Philippe Mathieu-Daudé, 2019/06/11
- Re: [Qemu-devel] [PATCH v19 00/21] Add RX archtecture support, no-reply, 2019/06/11