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[Qemu-devel] [PATCH 0/8] Optimize emulation of ten Altivec instructions:
From: |
Stefan Brankovic |
Subject: |
[Qemu-devel] [PATCH 0/8] Optimize emulation of ten Altivec instructions: lvsl, |
Date: |
Thu, 6 Jun 2019 12:15:22 +0200 |
This series buils up on and complements recent work of Thomas Murta, Mark
Cave-Ayland and Richard Henderson in the same area. It is based on devising TCG
translation implementation for selected instructions rather than using helpers.
The selected instructions are most of the time idiosyncratic to ppc platform,
so relatively complex TCG translation (without direct mapping to host
instruction that is not possible in these cases) seems to be the best option,
and that approach is presented in this series. The performance improvements are
significant in all cases.
Stefan Brankovic (8):
target/ppc: Optimize emulation of lvsl and lvsr instructions
target/ppc: Optimize emulation of vsl and vsr instructions
target/ppc: Optimize emulation of vpkpx instruction
target/ppc: Optimize emulation of vgbbd instruction
target/ppc: Optimize emulation of vclzd instruction
target/ppc: Optimize emulation of vclzw instruction
target/ppc: Optimize emulation of vclzh and vclzb instructions
target/ppc: Refactor emulation of vmrgew and vmrgow instructions
target/ppc/translate/vmx-impl.inc.c | 705 ++++++++++++++++++++++++++++++++----
1 file changed, 636 insertions(+), 69 deletions(-)
--
2.7.4
- [Qemu-devel] [PATCH 0/8] Optimize emulation of ten Altivec instructions: lvsl,,
Stefan Brankovic <=