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Re: [Qemu-devel] [PULL v2 00/36] pci, pc, virtio: features, fixes

From: Laszlo Ersek
Subject: Re: [Qemu-devel] [PULL v2 00/36] pci, pc, virtio: features, fixes
Date: Fri, 24 May 2019 12:56:56 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1

On 05/23/19 10:37, Peter Maydell wrote:
> On Thu, 23 May 2019 at 01:51, Laszlo Ersek <address@hidden> wrote:
>> I have narrowed down the issue sufficiently that I think I can hand
>> it over to Peter and Ard now -- because they know AARCH32 and AARCH64
>> assembly, and "target/arm/translate-a64.c" and "tcg/arm/*" too.
>> The summarize the issue for Ard, the symptom is that AARCH64
>> ArmVirtQemu runs perfectly fine with TCG on an x86-64 system, but it
>> crashes on an AARCH32 host system.
> Thanks for the investigation; this is probably more one for Richard
> than me.

I figured I'd provide some logs.

(1) To recap, the aarch64 assembly source code file that seems to be
mis-translated (from the aarch64 binary) lives at


The relevant functions are InternalMemCopyMem() and __memcpy().

(2) I disassembled the aarch64 binary with "objdump", and uploaded the
listing to:


The InternalMemCopyMem() function starts at hex offset 2b2ec. The
__memcpy() function starts at hex offset 2b180.

(3) I ran the guest with "-d in_asm,op,op_opt,op_ind,out_asm" and
uploaded the log file to:


The TBs that correspond to (parts of) the InternalMemCopyMem() and
__memcpy() functions are scattered over the file, but the offset between
the "nice" disassembly from (2), and the in-RAM TBs in (3), can be
determined from the fact that there is a single prfm instruction in the
entire binary. The instruction's offset is 0x2b180 in (2) -- at the
beginning of the __memcpy() function --, and its RAM address is
0x472d2180 in (3). Thus the difference (= the load address of
DxeCore.efi) is 0x472a7000.

(This is logged by the guest as well:

> Loading DXE CORE at 0x000472A7000 EntryPoint=0x000472A8000


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