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[Qemu-devel] [PULL 11/12] hw/arm/exynos4210: Add DMA support for the Exy
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 11/12] hw/arm/exynos4210: Add DMA support for the Exynos4210 |
Date: |
Thu, 23 May 2019 15:23:56 +0100 |
From: Guenter Roeck <address@hidden>
QEMU already supports pl330. Instantiate it for Exynos4210.
Relevant part of Linux arch/arm/boot/dts/exynos4.dtsi:
/ {
soc: soc {
amba {
pdma0: address@hidden {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: address@hidden {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma1: address@hidden {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12850000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
};
};
};
Signed-off-by: Guenter Roeck <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
[PMD: Do not set default qdev properties, create the controllers in the SoC
rather than the board (Peter Maydell), add dtsi in commit message]
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/exynos4210.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 0bf61134550..f942ed2be96 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -96,6 +96,11 @@
/* EHCI */
#define EXYNOS4210_EHCI_BASE_ADDR 0x12580000
+/* DMA */
+#define EXYNOS4210_PL330_BASE0_ADDR 0x12680000
+#define EXYNOS4210_PL330_BASE1_ADDR 0x12690000
+#define EXYNOS4210_PL330_BASE2_ADDR 0x12850000
+
static uint8_t chipid_and_omr[] = { 0x11, 0x02, 0x21, 0x43,
0x09, 0x00, 0x00, 0x00 };
@@ -160,6 +165,19 @@ static uint64_t exynos4210_calc_affinity(int cpu)
return (0x9 << ARM_AFF1_SHIFT) | cpu;
}
+static void pl330_create(uint32_t base, qemu_irq irq, int nreq)
+{
+ SysBusDevice *busdev;
+ DeviceState *dev;
+
+ dev = qdev_create(NULL, "pl330");
+ qdev_prop_set_uint8(dev, "num_periph_req", nreq);
+ qdev_init_nofail(dev);
+ busdev = SYS_BUS_DEVICE(dev);
+ sysbus_mmio_map(busdev, 0, base);
+ sysbus_connect_irq(busdev, 0, irq);
+}
+
Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
{
Exynos4210State *s = g_new0(Exynos4210State, 1);
@@ -410,5 +428,13 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR,
s->irq_table[exynos4210_get_irq(28, 3)]);
+ /*** DMA controllers ***/
+ pl330_create(EXYNOS4210_PL330_BASE0_ADDR,
+ qemu_irq_invert(s->irq_table[exynos4210_get_irq(35, 1)]), 32);
+ pl330_create(EXYNOS4210_PL330_BASE1_ADDR,
+ qemu_irq_invert(s->irq_table[exynos4210_get_irq(36, 1)]), 32);
+ pl330_create(EXYNOS4210_PL330_BASE2_ADDR,
+ qemu_irq_invert(s->irq_table[exynos4210_get_irq(34, 1)]), 1);
+
return s;
}
--
2.20.1
- [Qemu-devel] [PULL 00/12] target-arm queue, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 01/12] target/arm: Use extract2 for EXTR, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 02/12] target/arm: Simplify BFXIL expansion, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 03/12] target/arm: Fix vector operation segfault, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 04/12] arm: Move system_clock_scale to armv7m_systick.h, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 05/12] arm: Remove unnecessary includes of hw/arm/arm.h, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 11/12] hw/arm/exynos4210: Add DMA support for the Exynos4210,
Peter Maydell <=
- [Qemu-devel] [PULL 07/12] hw/intc/arm_gicv3: Fix write of ICH_VMCR_EL2.{VBPR0, VBPR1}, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 12/12] hw/arm/exynos4210: QOM'ify the Exynos4210 SoC, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 08/12] hw/intc/arm_gicv3: Fix writes to ICC_CTLR_EL3, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 10/12] hw/arm/exynos4: Use the IEC binary prefix definitions, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 09/12] hw/arm/exynos4: Remove unuseful debug code, Peter Maydell, 2019/05/23
- [Qemu-devel] [PULL 06/12] arm: Rename hw/arm/arm.h to hw/arm/boot.h, Peter Maydell, 2019/05/23
- Re: [Qemu-devel] [PULL 00/12] target-arm queue, Peter Maydell, 2019/05/24