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Re: [Qemu-devel] [PATCH v14 00/13] RX architecture support

From: Philippe Mathieu-Daudé
Subject: Re: [Qemu-devel] [PATCH v14 00/13] RX architecture support
Date: Fri, 17 May 2019 10:00:40 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1

On 5/17/19 6:51 AM, Richard Henderson wrote:
> This is Sato-san's v13, plus the typos that Phil noticed therein,
> plus the change to tlb_fill required by
>     commit d8276573da58e8ce78dab8c46dd660efd664bcb7
>     Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190510'
>     Add CPUClass::tlb_fill.
>     Improve tlb_vaddr_to_host for use by ARM SVE no-fault loads.
> r~
> Richard Henderson (1):
>   target/rx: Convert to CPUClass::tlb_fill
> Yoshinori Sato (12):
>   target/rx: TCG translation
>   target/rx: TCG helper
>   target/rx: CPU definition
>   target/rx: RX disassembler
>   hw/intc: RX62N interrupt controller (ICUa)
>   hw/timer: RX62N internal timer modules
>   hw/char: RX62N serial communication interface (SCI)
>   hw/rx: RX Target hardware definition
>   qemu/bitops.h: Add extract8 and extract16
>   hw/registerfields.h: Add 8bit and 16bit register macros
>   Add rx-softmmu

Tested-by: Philippe Mathieu-Daudé <address@hidden>

But please reorder patches before sending the pull request, see:

- patch 9 first "Add extract8 and extract16"
- patch 10 then "Add 8bit and 16bit register macros"
- then other patches 1-8, 11-13

This will help if we unlikely have to bisect ;)



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