Re: [Qemu-devel] [PATCH v3 39/39] tcg/arm: Remove mostly unreachable tlb special case

[Alistair Francis]

On Tue, May 7, 2019 at 5:34 PM Richard Henderson
<address@hidden> wrote:
>
> There was nothing armv7 specific about the bic+cmp sequence, however
> looking at the set of guests more closely shows that the 8-bit immediate
> operand for the bic can only be satisfied with one guest in tree:
> baseline m-profile -- 10-bit pages with aligned 4-byte memory ops.
> Therefore it does not seem useful to keep this path.
>
> Signed-off-by: Richard Henderson <address@hidden>

Acked-by: Alistair Francis <address@hidden>

Alistair

> ---
>  tcg/arm/tcg-target.inc.c | 23 ++++++++++++-----------
>  1 file changed, 12 insertions(+), 11 deletions(-)
>
> diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
> index ac813abfb8..e0fcc1d990 100644
> --- a/tcg/arm/tcg-target.inc.c
> +++ b/tcg/arm/tcg-target.inc.c
> @@ -1290,19 +1290,20 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg 
> addrlo, TCGReg addrhi,
>      tcg_out_ld32_12(s, COND_AL, TCG_REG_R1, TCG_REG_R1,
>                      offsetof(CPUTLBEntry, addend));
>
> -    /* Check alignment, check comparators.  */
> -    if (use_armv7_instructions) {
> +    /*
> +     * Check alignment, check comparators.
> +     * Do this in no more than 3 insns.  Use MOVW for v7, if possible,
> +     * to reduce the number of sequential conditional instructions.
> +     * Almost all guests have at least 4k pages, which means that we need
> +     * to clear at least 9 bits even for an 8-byte memory, which means it
> +     * isn't worth checking for an immediate operand for BIC.
> +     */
> +    if (use_armv7_instructions && TARGET_PAGE_BITS <= 16) {
>          tcg_target_ulong mask = ~(TARGET_PAGE_MASK | ((1 << a_bits) - 1));
> -        int rot = encode_imm(mask);
>
> -        if (rot >= 0) {
> -            tcg_out_dat_imm(s, COND_AL, ARITH_BIC, TCG_REG_TMP, addrlo,
> -                            rotl(mask, rot) | (rot << 7));
> -        } else {
> -            tcg_out_movi32(s, COND_AL, TCG_REG_TMP, mask);
> -            tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP,
> -                            addrlo, TCG_REG_TMP, 0);
> -        }
> +        tcg_out_movi32(s, COND_AL, TCG_REG_TMP, mask);
> +        tcg_out_dat_reg(s, COND_AL, ARITH_BIC, TCG_REG_TMP,
> +                        addrlo, TCG_REG_TMP, 0);
>          tcg_out_dat_reg(s, COND_AL, ARITH_CMP, 0, TCG_REG_R2, TCG_REG_TMP, 
> 0);
>      } else {
>          if (a_bits) {
> --
> 2.17.1
>
>