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[Qemu-devel] [PULL 10/27] target/mips: Pass a valid error to raise_mmu_e
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 10/27] target/mips: Pass a valid error to raise_mmu_exception for user-only |
Date: |
Fri, 10 May 2019 08:19:27 -0700 |
At present we give ret = 0, or TLBRET_MATCH. This gets matched
by the default case, which falls through to TLBRET_BADADDR.
However, it makes more sense to use a proper value. All of the
tlb-related exceptions are handled identically in cpu_loop.c,
so TLBRET_BADADDR is as good as any other. Retain it.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/mips/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/helper.c b/target/mips/helper.c
index c44cdca3b5..cc7be7703a 100644
--- a/target/mips/helper.c
+++ b/target/mips/helper.c
@@ -884,7 +884,7 @@ int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
int size, int rw,
int prot;
int access_type;
#endif
- int ret = 0;
+ int ret = TLBRET_BADADDR;
#if 0
log_cpu_state(cs, 0);
--
2.17.1
- [Qemu-devel] [PULL 00/27] tcg: Add CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 02/27] target/alpha: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 03/27] target/arm: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 05/27] target/hppa: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 06/27] target/i386: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 01/27] tcg: Add CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 04/27] target/cris: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 07/27] target/lm32: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 09/27] target/microblaze: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 10/27] target/mips: Pass a valid error to raise_mmu_exception for user-only,
Richard Henderson <=
- [Qemu-devel] [PULL 12/27] target/mips: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 13/27] target/moxie: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 08/27] target/m68k: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 11/27] target/mips: Tidy control flow in mips_cpu_handle_mmu_fault, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 14/27] target/nios2: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 15/27] target/openrisc: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 18/27] target/s390x: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 17/27] target/riscv: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 16/27] target/ppc: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10
- [Qemu-devel] [PULL 21/27] target/tilegx: Convert to CPUClass::tlb_fill, Richard Henderson, 2019/05/10