qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 25/26] tcg: Remove CPUClass::handle_mmu_fault


From: Philippe Mathieu-Daudé
Subject: Re: [Qemu-devel] [PATCH 25/26] tcg: Remove CPUClass::handle_mmu_fault
Date: Wed, 8 May 2019 08:03:16 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1

On 4/3/19 5:43 AM, Richard Henderson wrote:
> This hook is now completely replaced by tlb_fill.
> 
> Signed-off-by: Richard Henderson <address@hidden>

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>

> ---
>  include/qom/cpu.h     |  3 ---
>  accel/tcg/user-exec.c | 13 +++----------
>  2 files changed, 3 insertions(+), 13 deletions(-)
> 
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index 7e96a0aed3..8afcf0c427 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -118,7 +118,6 @@ struct TranslationBlock;
>   *       This always includes at least the program counter; some targets
>   *       will need to do more. If this hook is not implemented then the
>   *       default is to call @set_pc(tb->pc).
> - * @handle_mmu_fault: Callback for handling an MMU fault.
>   * @tlb_fill: Callback for handling a softmmu tlb miss or user-only
>   *       address fault.  For system mode, if the access is valid, call
>   *       tlb_set_page and return true; if the access is invalid, and
> @@ -198,8 +197,6 @@ typedef struct CPUClass {
>                                 Error **errp);
>      void (*set_pc)(CPUState *cpu, vaddr value);
>      void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
> -    int (*handle_mmu_fault)(CPUState *cpu, vaddr address, int size, int rw,
> -                            int mmu_index);
>      bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
>                       MMUAccessType access_type, int mmu_idx,
>                       bool probe, uintptr_t retaddr);
> diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
> index f13c0b2b67..d79bed0266 100644
> --- a/accel/tcg/user-exec.c
> +++ b/accel/tcg/user-exec.c
> @@ -63,7 +63,6 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t 
> *info,
>  {
>      CPUState *cpu = current_cpu;
>      CPUClass *cc;
> -    int ret;
>      unsigned long address = (unsigned long)info->si_addr;
>      MMUAccessType access_type;
>  
> @@ -162,15 +161,9 @@ static inline int handle_cpu_signal(uintptr_t pc, 
> siginfo_t *info,
>      helper_retaddr = 0;
>  
>      cc = CPU_GET_CLASS(cpu);
> -    if (cc->tlb_fill) {
> -        access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;
> -        cc->tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);
> -        g_assert_not_reached();
> -    } else {
> -        ret = cc->handle_mmu_fault(cpu, address, 0, is_write, MMU_USER_IDX);
> -        g_assert(ret > 0);
> -        cpu_loop_exit_restore(cpu, pc);
> -    }
> +    access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD;
> +    cc->tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);
> +    g_assert_not_reached();
>  }
>  
>  #if defined(__i386__)
> 



reply via email to

[Prev in Thread] Current Thread [Next in Thread]