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Re: [Qemu-devel] [PATCH v2] i386: Add some MSR based features on Cascade
Re: [Qemu-devel] [PATCH v2] i386: Add some MSR based features on Cascadelake-Server CPU model
Wed, 8 May 2019 08:54:00 +0800
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On 5/7/2019 11:06 PM, Eric Blake wrote:
On 5/7/19 8:07 AM, Daniel P. Berrangé wrote:
On Tue, May 07, 2019 at 08:48:53PM +0800, Tao Xu wrote:
As noted in
Rather than pointing to the mailing list post, please just refer
to the git commit hash that patch was merged under, which IIUC
Because MSR based feature has been supported by QEMU,
we add CPUID_7_0_EDX_ARCH_CAPABILITIES on Cascadelake-Server CPU
model, and add IA32_ARCH_CAPABILITIES MSR based features (RDCL_NO,
IBRS_ALL and SKIP_L1DFL_VMENTRY).
And "014018e19b i386: Make arch_capabilities migratable" has been
in QEMU upstream, the CPUID_7_0_EDX_ARCH_CAPABILITIES can be
safely added into CPU Model.
Also, this paragraph:
Changes in v2:
- rebased patch to latest qemu base
is useful to the list reader but not to the permanent git history, so it
Signed-off-by: Tao Xu <address@hidden>
...here, after the --- marker, so that 'git am' will strip it on the
maintainer's behalf when they prepare the patch for a pull request.
Thank your for your suggestion, Eric. I will rewrite my commit message.