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[Qemu-devel] [PULL 29/42] target/arm: Enable FPU for Cortex-M4 and Corte
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 29/42] target/arm: Enable FPU for Cortex-M4 and Cortex-M33 |
Date: |
Mon, 29 Apr 2019 18:00:17 +0100 |
Enable the FPU by default for the Cortex-M4 and Cortex-M33.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
target/arm/cpu.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 7deccda2404..a181fa8dc1a 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1493,8 +1493,12 @@ static void cortex_m4_initfn(Object *obj)
set_feature(&cpu->env, ARM_FEATURE_M);
set_feature(&cpu->env, ARM_FEATURE_M_MAIN);
set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP);
+ set_feature(&cpu->env, ARM_FEATURE_VFP4);
cpu->midr = 0x410fc240; /* r0p0 */
cpu->pmsav7_dregion = 8;
+ cpu->isar.mvfr0 = 0x10110021;
+ cpu->isar.mvfr1 = 0x11000011;
+ cpu->isar.mvfr2 = 0x00000000;
cpu->id_pfr0 = 0x00000030;
cpu->id_pfr1 = 0x00000200;
cpu->id_dfr0 = 0x00100000;
@@ -1521,9 +1525,13 @@ static void cortex_m33_initfn(Object *obj)
set_feature(&cpu->env, ARM_FEATURE_M_MAIN);
set_feature(&cpu->env, ARM_FEATURE_M_SECURITY);
set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP);
+ set_feature(&cpu->env, ARM_FEATURE_VFP4);
cpu->midr = 0x410fd213; /* r0p3 */
cpu->pmsav7_dregion = 16;
cpu->sau_sregion = 8;
+ cpu->isar.mvfr0 = 0x10110021;
+ cpu->isar.mvfr1 = 0x11000011;
+ cpu->isar.mvfr2 = 0x00000040;
cpu->id_pfr0 = 0x00000030;
cpu->id_pfr1 = 0x00000210;
cpu->id_dfr0 = 0x00200000;
--
2.20.1
- [Qemu-devel] [PULL 38/42] hw/devices: Move TI touchscreen declarations into a new header, (continued)
- [Qemu-devel] [PULL 38/42] hw/devices: Move TI touchscreen declarations into a new header, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 19/42] target/arm: Move NS TBFLAG from bit 19 to bit 6, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 39/42] hw/devices: Move LAN9118 declarations into a new header, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 35/42] hw/devices: Move Blizzard declarations into a new header, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 18/42] target/arm: Handle floating point registers in exception return, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 42/42] hw/devices: Move SMSC 91C111 declaration into a new header, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 23/42] target/arm: New helper function arm_v7m_mmu_idx_all(), Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 37/42] hw/devices: Move Gamepad declarations into a new header, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 26/42] target/arm: Implement M-profile lazy FP state preservation, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 36/42] hw/devices: Move CBus declarations into a new header, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 29/42] target/arm: Enable FPU for Cortex-M4 and Cortex-M33,
Peter Maydell <=
- [Qemu-devel] [PULL 40/42] hw/net/ne2000-isa: Add guards to the header, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 33/42] hw/display/tc6393xb: Remove unused functions, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 25/42] target/arm: Add lazy-FP-stacking support to v7m_stack_write(), Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 14/42] target/arm: Implement v7m_update_fpccr(), Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 31/42] hw/arm/aspeed: Use TYPE_TMP105/TYPE_PCA9552 instead of hardcoded string, Peter Maydell, 2019/04/29
- Re: [Qemu-devel] [PULL 00/42] target-arm queue, Peter Maydell, 2019/04/29