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[Qemu-devel] [PULL 01/42] hw/arm/smmuv3: Remove SMMUNotifierNode
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 01/42] hw/arm/smmuv3: Remove SMMUNotifierNode |
Date: |
Mon, 29 Apr 2019 17:59:49 +0100 |
From: Eric Auger <address@hidden>
The SMMUNotifierNode struct is not necessary and brings extra
complexity so let's remove it. We now directly track the SMMUDevices
which have registered IOMMU MR notifiers.
This is inspired from the same transformation on intel-iommu
done in commit b4a4ba0d68f50f218ee3957b6638dbee32a5eeef
("intel-iommu: remove IntelIOMMUNotifierNode")
Signed-off-by: Eric Auger <address@hidden>
Reviewed-by: Peter Xu <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
include/hw/arm/smmu-common.h | 8 ++------
hw/arm/smmu-common.c | 6 +++---
hw/arm/smmuv3.c | 28 +++++++---------------------
3 files changed, 12 insertions(+), 30 deletions(-)
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
index b07cadd0ef9..2c7fbf42025 100644
--- a/include/hw/arm/smmu-common.h
+++ b/include/hw/arm/smmu-common.h
@@ -80,13 +80,9 @@ typedef struct SMMUDevice {
AddressSpace as;
uint32_t cfg_cache_hits;
uint32_t cfg_cache_misses;
+ QLIST_ENTRY(SMMUDevice) next;
} SMMUDevice;
-typedef struct SMMUNotifierNode {
- SMMUDevice *sdev;
- QLIST_ENTRY(SMMUNotifierNode) next;
-} SMMUNotifierNode;
-
typedef struct SMMUPciBus {
PCIBus *bus;
SMMUDevice *pbdev[0]; /* Parent array is sparse, so dynamically alloc */
@@ -108,7 +104,7 @@ typedef struct SMMUState {
GHashTable *iotlb;
SMMUPciBus *smmu_pcibus_by_bus_num[SMMU_PCI_BUS_MAX];
PCIBus *pci_bus;
- QLIST_HEAD(, SMMUNotifierNode) notifiers_list;
+ QLIST_HEAD(, SMMUDevice) devices_with_notifiers;
uint8_t bus_num;
PCIBus *primary_bus;
} SMMUState;
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index bbf4b8721a3..e94be6db6c1 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -412,10 +412,10 @@ inline void smmu_inv_notifiers_mr(IOMMUMemoryRegion *mr)
/* Unmap all notifiers of all mr's */
void smmu_inv_notifiers_all(SMMUState *s)
{
- SMMUNotifierNode *node;
+ SMMUDevice *sdev;
- QLIST_FOREACH(node, &s->notifiers_list, next) {
- smmu_inv_notifiers_mr(&node->sdev->iommu);
+ QLIST_FOREACH(sdev, &s->devices_with_notifiers, next) {
+ smmu_inv_notifiers_mr(&sdev->iommu);
}
}
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 8c4e99fecc6..fd8ec7860ee 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -828,10 +828,10 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
/* invalidate an asid/iova tuple in all mr's */
static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, dma_addr_t iova)
{
- SMMUNotifierNode *node;
+ SMMUDevice *sdev;
- QLIST_FOREACH(node, &s->notifiers_list, next) {
- IOMMUMemoryRegion *mr = &node->sdev->iommu;
+ QLIST_FOREACH(sdev, &s->devices_with_notifiers, next) {
+ IOMMUMemoryRegion *mr = &sdev->iommu;
IOMMUNotifier *n;
trace_smmuv3_inv_notifiers_iova(mr->parent_obj.name, asid, iova);
@@ -1472,8 +1472,6 @@ static void smmuv3_notify_flag_changed(IOMMUMemoryRegion
*iommu,
SMMUDevice *sdev = container_of(iommu, SMMUDevice, iommu);
SMMUv3State *s3 = sdev->smmu;
SMMUState *s = &(s3->smmu_state);
- SMMUNotifierNode *node = NULL;
- SMMUNotifierNode *next_node = NULL;
if (new & IOMMU_NOTIFIER_MAP) {
int bus_num = pci_bus_num(sdev->bus);
@@ -1485,22 +1483,10 @@ static void
smmuv3_notify_flag_changed(IOMMUMemoryRegion *iommu,
if (old == IOMMU_NOTIFIER_NONE) {
trace_smmuv3_notify_flag_add(iommu->parent_obj.name);
- node = g_malloc0(sizeof(*node));
- node->sdev = sdev;
- QLIST_INSERT_HEAD(&s->notifiers_list, node, next);
- return;
- }
-
- /* update notifier node with new flags */
- QLIST_FOREACH_SAFE(node, &s->notifiers_list, next, next_node) {
- if (node->sdev == sdev) {
- if (new == IOMMU_NOTIFIER_NONE) {
- trace_smmuv3_notify_flag_del(iommu->parent_obj.name);
- QLIST_REMOVE(node, next);
- g_free(node);
- }
- return;
- }
+ QLIST_INSERT_HEAD(&s->devices_with_notifiers, sdev, next);
+ } else if (new == IOMMU_NOTIFIER_NONE) {
+ trace_smmuv3_notify_flag_del(iommu->parent_obj.name);
+ QLIST_REMOVE(sdev, next);
}
}
--
2.20.1
- [Qemu-devel] [PULL 00/42] target-arm queue, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 02/42] hw/ssi/xilinx_spips: Avoid variable length array, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 06/42] target/arm: Implement dummy versions of M-profile FP-related registers, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 05/42] hw/intc/armv7m_nvic: Allow reading of M-profile MVFR* registers, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 03/42] configure: Remove --source-path option, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 01/42] hw/arm/smmuv3: Remove SMMUNotifierNode,
Peter Maydell <=
- [Qemu-devel] [PULL 07/42] target/arm: Disable most VFP sysregs for M-profile, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 15/42] target/arm: Clear CONTROL.SFPA in BXNS and BLXNS, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 17/42] target/arm: Allow for floating point in callee stack integrity check, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 13/42] target/arm: Handle floating point registers in exception entry, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 09/42] target/arm: Decode FP instructions for M profile, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 21/42] target/arm: Set FPCCR.S when executing M-profile floating point insns, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 08/42] target/arm: Honour M-profile FP enable bits, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 22/42] target/arm: Activate M-profile floating point context when FPCCR.ASPEN is set, Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 24/42] target/arm: New function armv7m_nvic_set_pending_lazyfp(), Peter Maydell, 2019/04/29
- [Qemu-devel] [PULL 30/42] hw/dma: Compile the bcm2835_dma device as common object, Peter Maydell, 2019/04/29