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[Qemu-devel] [PATCH 35/38] tcg: Introduce do_op3_nofail for vector expan
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 35/38] tcg: Introduce do_op3_nofail for vector expansion |
Date: |
Fri, 19 Apr 2019 21:34:39 -1000 |
This makes do_op3 match do_op2 in allowing for failure,
and thus fall back expansions.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/tcg-op-vec.c | 45 +++++++++++++++++++++++++++------------------
1 file changed, 27 insertions(+), 18 deletions(-)
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index 7d8f7b490a..5868a51270 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -450,7 +450,7 @@ void tcg_gen_cmp_vec(TCGCond cond, unsigned vece,
}
}
-static void do_op3(unsigned vece, TCGv_vec r, TCGv_vec a,
+static bool do_op3(unsigned vece, TCGv_vec r, TCGv_vec a,
TCGv_vec b, TCGOpcode opc)
{
TCGTemp *rt = tcgv_vec_temp(r);
@@ -468,82 +468,91 @@ static void do_op3(unsigned vece, TCGv_vec r, TCGv_vec a,
can = tcg_can_emit_vec_op(opc, type, vece);
if (can > 0) {
vec_gen_3(opc, type, vece, ri, ai, bi);
- } else {
+ } else if (can < 0) {
const TCGOpcode *hold_list = tcg_swap_vecop_list(NULL);
- tcg_debug_assert(can < 0);
tcg_expand_vec_op(opc, type, vece, ri, ai, bi);
tcg_swap_vecop_list(hold_list);
+ } else {
+ return false;
}
+ return true;
+}
+
+static void do_op3_nofail(unsigned vece, TCGv_vec r, TCGv_vec a,
+ TCGv_vec b, TCGOpcode opc)
+{
+ bool ok = do_op3(vece, r, a, b, opc);
+ tcg_debug_assert(ok);
}
void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_add_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_add_vec);
}
void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_sub_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_sub_vec);
}
void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_mul_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_mul_vec);
}
void tcg_gen_ssadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_ssadd_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_ssadd_vec);
}
void tcg_gen_usadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_usadd_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_usadd_vec);
}
void tcg_gen_sssub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_sssub_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_sssub_vec);
}
void tcg_gen_ussub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_ussub_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_ussub_vec);
}
void tcg_gen_smin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_smin_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_smin_vec);
}
void tcg_gen_umin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_umin_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_umin_vec);
}
void tcg_gen_smax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_smax_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_smax_vec);
}
void tcg_gen_umax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_umax_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_umax_vec);
}
void tcg_gen_shlv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_shlv_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_shlv_vec);
}
void tcg_gen_shrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_shrv_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_shrv_vec);
}
void tcg_gen_sarv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
{
- do_op3(vece, r, a, b, INDEX_op_sarv_vec);
+ do_op3_nofail(vece, r, a, b, INDEX_op_sarv_vec);
}
static void do_shifts(unsigned vece, TCGv_vec r, TCGv_vec a,
@@ -579,7 +588,7 @@ static void do_shifts(unsigned vece, TCGv_vec r, TCGv_vec a,
} else {
tcg_gen_dup_i32_vec(vece, vec_s, s);
}
- do_op3(vece, r, a, vec_s, opc_v);
+ do_op3_nofail(vece, r, a, vec_s, opc_v);
tcg_temp_free_vec(vec_s);
}
tcg_swap_vecop_list(hold_list);
--
2.17.1
- [Qemu-devel] [PATCH 16/38] tcg: Specify optional vector requirements with a list, (continued)
- [Qemu-devel] [PATCH 16/38] tcg: Specify optional vector requirements with a list, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 23/38] target/ppc: Use tcg_gen_abs_tl, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 24/38] target/s390x: Use tcg_gen_abs_i64, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 25/38] target/xtensa: Use tcg_gen_abs_i32, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 21/38] target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 34/38] tcg: Do not recreate INDEX_op_neg_vec unless supported, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 37/38] tcg/aarch64: Use MVNI for expansion of dupi, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 26/38] tcg/i386: Support vector absolute value, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 31/38] target/ppc: Use vector variable shifts for VS{L, R, RA}{B, H, W, D}, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 35/38] tcg: Introduce do_op3_nofail for vector expansion,
Richard Henderson <=
- [Qemu-devel] [PATCH 33/38] tcg/aarch64: Do not advertise minmax for MO_64, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 29/38] tcg/i386: Support vector comparison select value, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 38/38] tcg/aarch64: Use ORRI and BICI for vector logical operations, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 28/38] tcg: Add support for vector comparison select, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 22/38] target/cris: Use tcg_gen_abs_tl, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 36/38] tcg: Expand vector minmax using cmp+cmpsel, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 20/38] tcg: Add support for vector absolute value, Richard Henderson, 2019/04/20
- [Qemu-devel] [PATCH 27/38] tcg/aarch64: Support vector absolute value, Richard Henderson, 2019/04/20
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