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[Qemu-devel] [PULL 0/2] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 0/2] target-arm queue |
Date: |
Tue, 26 Mar 2019 13:10:54 +0000 |
Two last-minute regression fixes that I thought we might as well
squeeze in before rc1.
thanks
-- PMM
The following changes since commit d37bfe142382fa8258531c47b4519387c77cd169:
Merge remote-tracking branch
'remotes/palmer/tags/riscv-for-master-4.0-rc1-v2' into staging (2019-03-26
10:27:20 +0000)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20190326
for you to fetch changes up to c99ef792dc9ec6d8a5061428faf396ea9ceb8f57:
gdbstub: fix vCont packet handling when no thread is specified (2019-03-26
12:53:26 +0000)
----------------------------------------------------------------
target-arm queue:
* Set SIMDMISC and FPMISC for 32-bit -cpu max
(fixes regression from 3.1)
* fix vCont packet handling when no thread is specified
----------------------------------------------------------------
Luc Michel (1):
gdbstub: fix vCont packet handling when no thread is specified
Richard Henderson (1):
target/arm: Set SIMDMISC and FPMISC for 32-bit -cpu max
gdbstub.c | 14 ++++++++++++--
target/arm/cpu.c | 5 +++++
2 files changed, 17 insertions(+), 2 deletions(-)
- [Qemu-devel] [PULL 0/2] target-arm queue,
Peter Maydell <=