[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v3] target/mips: Fix minor bug in FPU
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v3] target/mips: Fix minor bug in FPU |
Date: |
Tue, 19 Mar 2019 15:27:31 +0000 |
On Tue, 19 Mar 2019 at 15:22, Mateja Marjanovic
<address@hidden> wrote:
>
> From: Mateja Marjanovic <address@hidden>
>
> Wrong type of NaN was generated for IEEE 754-2008 by MADDF.<D|S> and
> MSUBF.<D|S> instructions when the arguments were (inf, zero, nan) or
> (zero, inf, nan).
> These instructions were tested and the results match with the results
> of the machine that has a MIPS64 r6 cpu.
>
> Signed-off-by: Mateja Marjanovic <address@hidden>
> ---
> fpu/softfloat-specialize.h | 24 ++++++++++++++++--------
> 1 file changed, 16 insertions(+), 8 deletions(-)
>
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM