Re: [Qemu-devel] [PULL] RISC-V Patches for 4.0-rc0, Part 2

[Peter Maydell]

On Tue, 19 Mar 2019 at 12:54, Palmer Dabbelt <address@hidden> wrote:
>
> The following changes since commit 86e2fca2d7f163c50b80254e0afdd4e16378b3bb:
>
>   Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.0-20190319' 
> into staging (2019-03-19 10:52:45 +0000)
>
> are available in the Git repository at:
>
>   git://github.com/palmer-dabbelt/qemu.git tags/riscv-for-master-4.0-rc0-2
>
> for you to fetch changes up to a9ec1c76d57491602b4d3b521f898905825ca848:
>
>   riscv: sifive_u: Correct UART0's IRQ in the device tree (2019-03-19 
> 05:18:42 -0700)
>
> ----------------------------------------------------------------
> RISC-V Patches for 4.0-rc0, Part 2
>
> This patch set contains three major sources of bug fixes:
>
> * Jim has added support for GDB XML files, as well as fixing access to
>   CSRs via the GDB stub.
> * Alistair has rebased a large set of fixes from Michael that were still
>   in his patch queue.  These fix bugs all over our tree, including:
>     * Logging of PMP errors.
>     * User ABI cleanups and fixes, most notably on RVE guests.
>     * Fixes for interrupt emulation fidelity.
>     * Improvements to the emulation fidelity of the sifive_u machine.
> * Bin Meng has improved the emulation fidelity of the SiFive UART, which
>   now supports both TX and RX interrupts (as well as setting the correct
>   interrupt line).
>
> This should clear out the bug fix queue that piled up after the
> decodetree conversion.
>

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.0
for any user-visible changes.

-- PMM