Re: [Qemu-devel] [PATCH v1 1/1] riscv: plic: Set msi_nonbroken as true

[Paolo Bonzini]

On 15/03/19 21:05, Alistair Francis wrote:
> Set msi_nonbroken as true for the PLIC.
> 
> According to the comment located here:
> https://git.qemu.org/?p=qemu.git;a=blob;f=hw/pci/msi.c;h=47d2b0f33c664533b8dbd5cb17faa8e6a01afe1f;hb=HEAD#l38
> the msi_nonbroken variable should be set to true even if they don't
> support MSI. In this case that is what we are doing as we don't support
> MSI.
> 
> Signed-off-by: Alistair Francis <address@hidden>
> Reported-by: Andrea Bolognani <address@hidden>
> Reported-by: David Abdurachmanov <address@hidden>
> ---
> This should allow working pcie-root-ports in QEMU and allow libvirt
> to start using PCIe by default for RISC-V guests.
> 
> hw/riscv/sifive_plic.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c
> index d12ec3fc9a..4b0537c912 100644
> --- a/hw/riscv/sifive_plic.c
> +++ b/hw/riscv/sifive_plic.c
> @@ -22,6 +22,7 @@
>  #include "qemu/log.h"
>  #include "qemu/error-report.h"
>  #include "hw/sysbus.h"
> +#include "hw/pci/msi.h"
>  #include "target/riscv/cpu.h"
>  #include "hw/riscv/sifive_plic.h"
>  
> @@ -443,6 +444,8 @@ static void sifive_plic_realize(DeviceState *dev, Error 
> **errp)
>      plic->enable = g_new0(uint32_t, plic->bitfield_words * plic->num_addrs);
>      sysbus_init_mmio(SYS_BUS_DEVICE(dev), &plic->mmio);
>      qdev_init_gpio_in(dev, sifive_plic_irq_request, plic->num_sources);
> +
> +    msi_nonbroken = true;
>  }
>  
>  static void sifive_plic_class_init(ObjectClass *klass, void *data)
> 

I can queue this patch, and add the "select MSI" to CONFIG_SIFIVE.

Paolo