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[Qemu-devel] [PULL 27/62] ppc/pnv: introduce a new dt_populate() operati
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 27/62] ppc/pnv: introduce a new dt_populate() operation to the chip model |
Date: |
Tue, 12 Mar 2019 19:54:27 +1100 |
From: Cédric Le Goater <address@hidden>
The POWER9 and POWER8 processors have a different set of devices and a
different device tree layout.
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 27 +++++++++++++++++++++++++--
include/hw/ppc/pnv.h | 1 +
2 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index a7ec76dbd6..087541a91a 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -267,7 +267,7 @@ static void pnv_dt_icp(PnvChip *chip, void *fdt, uint32_t
pir,
g_free(reg);
}
-static void pnv_dt_chip(PnvChip *chip, void *fdt)
+static void pnv_chip_power8_dt_populate(PnvChip *chip, void *fdt)
{
const char *typename = pnv_chip_core_typename(chip);
size_t typesize = object_type_get_instance_size(typename);
@@ -289,6 +289,25 @@ static void pnv_dt_chip(PnvChip *chip, void *fdt)
}
}
+static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt)
+{
+ const char *typename = pnv_chip_core_typename(chip);
+ size_t typesize = object_type_get_instance_size(typename);
+ int i;
+
+ pnv_dt_xscom(chip, fdt, 0);
+
+ for (i = 0; i < chip->nr_cores; i++) {
+ PnvCore *pnv_core = PNV_CORE(chip->cores + i * typesize);
+
+ pnv_dt_core(chip, pnv_core, fdt);
+ }
+
+ if (chip->ram_size) {
+ pnv_dt_memory(fdt, chip->chip_id, chip->ram_start, chip->ram_size);
+ }
+}
+
static void pnv_dt_rtc(ISADevice *d, void *fdt, int lpc_off)
{
uint32_t io_base = d->ioport_id;
@@ -474,7 +493,7 @@ static void *pnv_dt_create(MachineState *machine)
/* Populate device tree for each chip */
for (i = 0; i < pnv->num_chips; i++) {
- pnv_dt_chip(pnv->chips[i], fdt);
+ PNV_CHIP_GET_CLASS(pnv->chips[i])->dt_populate(pnv->chips[i], fdt);
}
/* Populate ISA devices on chip 0 */
@@ -858,6 +877,7 @@ static void pnv_chip_power8e_class_init(ObjectClass *klass,
void *data)
k->core_pir = pnv_chip_core_pir_p8;
k->intc_create = pnv_chip_power8_intc_create;
k->isa_create = pnv_chip_power8_isa_create;
+ k->dt_populate = pnv_chip_power8_dt_populate;
k->xscom_base = 0x003fc0000000000ull;
dc->desc = "PowerNV Chip POWER8E";
@@ -876,6 +896,7 @@ static void pnv_chip_power8_class_init(ObjectClass *klass,
void *data)
k->core_pir = pnv_chip_core_pir_p8;
k->intc_create = pnv_chip_power8_intc_create;
k->isa_create = pnv_chip_power8_isa_create;
+ k->dt_populate = pnv_chip_power8_dt_populate;
k->xscom_base = 0x003fc0000000000ull;
dc->desc = "PowerNV Chip POWER8";
@@ -894,6 +915,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass
*klass, void *data)
k->core_pir = pnv_chip_core_pir_p8;
k->intc_create = pnv_chip_power8_intc_create;
k->isa_create = pnv_chip_power8nvl_isa_create;
+ k->dt_populate = pnv_chip_power8_dt_populate;
k->xscom_base = 0x003fc0000000000ull;
dc->desc = "PowerNV Chip POWER8NVL";
@@ -954,6 +976,7 @@ static void pnv_chip_power9_class_init(ObjectClass *klass,
void *data)
k->core_pir = pnv_chip_core_pir_p9;
k->intc_create = pnv_chip_power9_intc_create;
k->isa_create = pnv_chip_power9_isa_create;
+ k->dt_populate = pnv_chip_power9_dt_populate;
k->xscom_base = 0x00603fc00000000ull;
dc->desc = "PowerNV Chip POWER9";
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index ebbb3d0e9a..fa9ec50fd5 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -102,6 +102,7 @@ typedef struct PnvChipClass {
uint32_t (*core_pir)(PnvChip *chip, uint32_t core_id);
void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp);
ISABus *(*isa_create)(PnvChip *chip, Error **errp);
+ void (*dt_populate)(PnvChip *chip, void *fdt);
} PnvChipClass;
#define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
--
2.20.1
- [Qemu-devel] [PULL 02/62] vfio/spapr: Rename local systempagesize variable, (continued)
- [Qemu-devel] [PULL 02/62] vfio/spapr: Rename local systempagesize variable, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 05/62] target/ppc/spapr: Add SPAPR_CAP_LARGE_DECREMENTER, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 07/62] target/ppc: Implement large decrementer support for KVM, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 14/62] target/ppc: Move handling of hardware breakpoints to a separate function, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 09/62] target/ppc/spapr: Add workaround option to SPAPR_CAP_IBS, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 10/62] target/ppc/spapr: Add SPAPR_CAP_CCF_ASSIST, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 17/62] target/ppc/spapr: Clear partition table entry when allocating hash table, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 08/62] target/ppc/spapr: Enable the large decrementer for pseries-4.0, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 13/62] target/ppc: Move exception vector offset computation into a function, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 06/62] target/ppc: Implement large decrementer support for TCG, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 27/62] ppc/pnv: introduce a new dt_populate() operation to the chip model,
David Gibson <=
- [Qemu-devel] [PULL 25/62] ppc/pnv: change the CPU machine_data presenter type to Object *, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 11/62] target/ppc/tcg: make spapr_caps apply cap-[cfpc/sbbc/ibs] non-fatal for tcg, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 20/62] PPC: E500: Add FSL I2C controller and integrate RTC with it, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 23/62] ppc/xive: export the TIMA memory accessors, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 19/62] target/ppc/spapr: Enable H_PAGE_INIT in-kernel handling, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 12/62] target/ppc/spapr: Enable mitigations by default for pseries-4.0 machine type, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 15/62] target/ppc: Refactor kvm_handle_debug, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 28/62] ppc/pnv: introduce a new pic_print_info() operation to the chip model, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 32/62] ppc/pnv: psi: add a reset handler, David Gibson, 2019/03/12
- [Qemu-devel] [PULL 22/62] ppc: externalize ppc_get_vcpu_by_pir(), David Gibson, 2019/03/12