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[Qemu-devel] [PULL 17/60] target/ppc/spapr: Clear partition table entry
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 17/60] target/ppc/spapr: Clear partition table entry when allocating hash table |
Date: |
Sun, 10 Mar 2019 19:26:20 +1100 |
From: Suraj Jitindar Singh <address@hidden>
If we allocate a hash page table then we know that the guest won't be
using process tables, so set the partition table entry maintained for
the guest to zero. If this isn't done, then the guest radix bit will
remain set in the entry. This means that when the guest calls
H_REGISTER_PROCESS_TABLE there will be a mismatch between then flags
and the value in spapr->patb_entry, and the call will fail. The guest
will then panic:
Failed to register process table (rc=-4)
kernel BUG at arch/powerpc/platforms/pseries/lpar.c:959
The result being that it isn't possible to boot a hash guest on a P9
system.
Also fix a bug in the flags parsing in h_register_process_table() which
was introduced by the same patch, and simplify the handling to make it
less likely that errors will be introduced in the future. The effect
would have been setting the host radix bit LPCR_HR for a hash guest
using process tables, which currently isn't supported and so couldn't
have been triggered.
Fixes: 00fd075e18 "target/ppc/spapr: Set LPCR:HR when using Radix mode"
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr.c | 1 +
hw/ppc/spapr_hcall.c | 12 ++++++++----
2 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 946bbcf9ee..755056875c 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1632,6 +1632,7 @@ void spapr_reallocate_hpt(sPAPRMachineState *spapr, int
shift,
}
}
/* We're setting up a hash table, so that means we're not radix */
+ spapr->patb_entry = 0;
spapr_set_all_lpcrs(0, LPCR_HR | LPCR_UPRT);
}
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 8bfdddc964..7016a09386 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1339,6 +1339,7 @@ static target_ulong h_register_process_table(PowerPCCPU
*cpu,
target_ulong proc_tbl = args[1];
target_ulong page_size = args[2];
target_ulong table_size = args[3];
+ target_ulong update_lpcr = 0;
uint64_t cproc;
if (flags & ~FLAGS_MASK) { /* Check no reserved bits are set */
@@ -1394,10 +1395,13 @@ static target_ulong h_register_process_table(PowerPCCPU
*cpu,
spapr->patb_entry = cproc; /* Save new process table */
/* Update the UPRT, HR and GTSE bits in the LPCR for all cpus */
- spapr_set_all_lpcrs(((flags & (FLAG_RADIX | FLAG_HASH_PROC_TBL)) ?
- (LPCR_UPRT | LPCR_HR) : 0) |
- ((flags & FLAG_GTSE) ? LPCR_GTSE : 0),
- LPCR_UPRT | LPCR_HR | LPCR_GTSE);
+ if (flags & FLAG_RADIX) /* Radix must use process tables, also set HR
*/
+ update_lpcr |= (LPCR_UPRT | LPCR_HR);
+ else if (flags & FLAG_HASH_PROC_TBL) /* Hash with process tables */
+ update_lpcr |= LPCR_UPRT;
+ if (flags & FLAG_GTSE) /* Guest translation shootdown enable */
+ update_lpcr |= FLAG_GTSE;
+ spapr_set_all_lpcrs(update_lpcr, LPCR_UPRT | LPCR_HR | LPCR_GTSE);
if (kvm_enabled()) {
return kvmppc_configure_v3_mmu(cpu, flags & FLAG_RADIX,
--
2.20.1
- [Qemu-devel] [PULL 03/60] spapr: Simulate CAS for qtest, (continued)
- [Qemu-devel] [PULL 03/60] spapr: Simulate CAS for qtest, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 13/60] target/ppc: Move exception vector offset computation into a function, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 08/60] target/ppc/spapr: Enable the large decrementer for pseries-4.0, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 09/60] target/ppc/spapr: Add workaround option to SPAPR_CAP_IBS, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 07/60] target/ppc: Implement large decrementer support for KVM, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 12/60] target/ppc/spapr: Enable mitigations by default for pseries-4.0 machine type, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 11/60] target/ppc/tcg: make spapr_caps apply cap-[cfpc/sbbc/ibs] non-fatal for tcg, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 10/60] target/ppc/spapr: Add SPAPR_CAP_CCF_ASSIST, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 18/60] spapr: Force SPAPR_MEMORY_BLOCK_SIZE to be a hwaddr (64-bit), David Gibson, 2019/03/10
- [Qemu-devel] [PULL 19/60] target/ppc/spapr: Enable H_PAGE_INIT in-kernel handling, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 17/60] target/ppc/spapr: Clear partition table entry when allocating hash table,
David Gibson <=
- [Qemu-devel] [PULL 14/60] target/ppc: Move handling of hardware breakpoints to a separate function, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 29/60] ppc/xive: activate HV support, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 21/60] ppc/xive: hardwire the Physical CAM line of the thread context, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 06/60] target/ppc: Implement large decrementer support for TCG, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 15/60] target/ppc: Refactor kvm_handle_debug, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 22/60] ppc: externalize ppc_get_vcpu_by_pir(), David Gibson, 2019/03/10
- [Qemu-devel] [PULL 25/60] ppc/pnv: change the CPU machine_data presenter type to Object *, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 20/60] PPC: E500: Add FSL I2C controller and integrate RTC with it, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 32/60] ppc/pnv: psi: add a reset handler, David Gibson, 2019/03/10
- [Qemu-devel] [PULL 30/60] ppc/pnv: fix logging primitives using Ox, David Gibson, 2019/03/10